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WED7G288IDE36ADC25 Datasheet(PDF) 5 Page - White Electronic Designs Corporation |
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WED7G288IDE36ADC25 Datasheet(HTML) 5 Page - White Electronic Designs Corporation |
5 / 8 page 5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WED7GxxxIDE36 WED7GxxxIDE33 July, 2003 Rev. 0 PRELIMINARY* White Electronic Designs Corp. reserves the right to change products or specifications without notice. POWER BACKUP TIMING Shown in the following two figures are the differences in operation between the WED7GxxxIDE33 module, and the WED7GxxxIDE36 module with Power Failure Protection Circuit. Figure 1 shows how a sector is written to a NAND Flash. The entire sector is received and then is written at one time. The RDY/BSY line stays busy until proper writing of the data is ensured. If power loss occurs before the RDY/BSY line becomes ready again, the module may have correctly written the data, but this is not ensured. Therefore the data may be corrupted. Figure 2 shows the protected module. The power is again lost after the second sector (Sector n+1) is received, but the internal backup power allows the sector to be properly written, and the card completes the write sector operation. Data Written/Device Ready Device in Write Process/Busy RDY/BSY Sector Write Process Power Loss Data Transmitted External V CC Internal V CC Data Received Data Written n n+1 Possibly Corrupted Sector Sector n Sector n+1 Sector n+2 Sector n Sector n+1 FIG. 2 POWER LOSS WITHOUT POWER FAILURE PROTECTION CIRCUIT Note: Sector Blocks in these diagrams do not represent a difference with size of data written, between the data received and the data written. This represents the shorter time to write the data than to transmit it. |
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