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WED7PXXXATA70XXI25 Datasheet(PDF) 9 Page - White Electronic Designs Corporation |
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WED7PXXXATA70XXI25 Datasheet(HTML) 9 Page - White Electronic Designs Corporation |
9 / 15 page 9 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WED7PxxxATA70xxI25 July 2005 Rev. 1 White Electronic Designs Corp. reserves the right to change products or specifications without notice. I/O Access Write AC Characteristics SYMBOL PARAMETER MIN MAX UNIT tSU Data setup before IOWR# 60 — ns tH Data hold following IOWR# 30 — tW IOWR# pulse width 165 — tSUA Address setup before IOWR# 70 — tHA Address hold following IOWR# 20 — tSUCE CE# setup before IOWR# 5 — tHCE CE# hold following IOWR# 20 — tSUREG REG# setup before IOWR# 5 — tHREG REG# hold following IOWR# 0 — tDFIOIS16 IOIS16# delay failing from address — 35 tDRIOIS16 IOIS16# delay rising from address — 35 Common Memory Access Read AC Characteristics SYMBOL PARAMETER MIN MAX UNIT tA OE# access time — 125 ns tDIS Output disable time (OE#) — 100 tSU Address setup time 30 — tH Address hold time 20 — tSU CE# setup before OE# 0 — tH OE# hold following OE# 20 — Common Memory Access Write AC Characteristics SYMBOL PARAMETER MIN MAX UNIT tSU Data setup before WE# 80 — ns tH Data hold following WE# 30 — tW Write pulse width 150 — tH Address hold time 20 — tSU Address setup time 30 — tSU CE# setup time 0 — tREC Write recover time 30 — tH CE# hold following WE# 20 — |
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