Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

W3EG6464S263JD3 Datasheet(PDF) 6 Page - White Electronic Designs Corporation

Part # W3EG6464S263JD3
Description  512MB - 64Mx64 DDR SDRAM UNBUFFERED
Download  12 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  WEDC [White Electronic Designs Corporation]
Direct Link  http://www.whiteedc.com
Logo WEDC - White Electronic Designs Corporation

W3EG6464S263JD3 Datasheet(HTML) 6 Page - White Electronic Designs Corporation

Back Button W3EG6464S263JD3 Datasheet HTML 2Page - White Electronic Designs Corporation W3EG6464S263JD3 Datasheet HTML 3Page - White Electronic Designs Corporation W3EG6464S263JD3 Datasheet HTML 4Page - White Electronic Designs Corporation W3EG6464S263JD3 Datasheet HTML 5Page - White Electronic Designs Corporation W3EG6464S263JD3 Datasheet HTML 6Page - White Electronic Designs Corporation W3EG6464S263JD3 Datasheet HTML 7Page - White Electronic Designs Corporation W3EG6464S263JD3 Datasheet HTML 8Page - White Electronic Designs Corporation W3EG6464S263JD3 Datasheet HTML 9Page - White Electronic Designs Corporation W3EG6464S263JD3 Datasheet HTML 10Page - White Electronic Designs Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 12 page
background image
White Electronic Designs
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
May 2005
Rev. 3
W3EG6464S-JD3-D3
PRELIMINARY
IDD1 : OPERATING CURRENT : ONE BANK
1.
Typical Case : VCC=2.5V, T=25°C
2.
Worst Case : VCC=2.7V, T=10°C
3.
Only one bank is accessed with tRC (min), Burst
Mode, Address and Control inputs on NOP edge
are changing once per clock cycle. IOUT = 0mA
4.
Timing Patterns :
DDR200 (100 MHz, CL=2) : tCK=10ns, CL2,
BL=4, tRCD=2*tCK, tRAS=5*tCK
Read : A0 N R0 N N P0 N A0 N - repeat the
same timing with random address changing;
50% of data changing at every burst
DDR266 (133MHz, CL=2.5) : tCK=7.5ns,
CL=2.5, BL=4, tRCD=3*tCK, tRC=9*tCK, tRAS=5*tCK
Read : A0 N N R0 N P0 N N N A0 N - repeat
the same timing with random address
changing; 50% of data changing at every burst
DDR266 (133MHz, CL=2) : tCK=7.5ns, CL=2,
BL=4, tRCD=3*tCK, tRC=9*tCK, tRAS=5*tCK
Read : A0 N N R0 N P0 N N N A0 N - repeat
the same timing with random address
changing; 50% of data changing at every burst
IDD7A : OPERATING CURRENT : FOUR BANKS
1.
Typical Case : VCC=2.5V, T=25°C
2.
Worst Case : VCC=2.7V, T=10°C
3.
Four banks are being interleaved with tRC (min),
Burst Mode, Address and Control inputs on NOP
edge are not changing. Iout=0mA
4.
Timing Patterns :
DDR200 (100 MHz, CL=2) : tCK=10ns, CL2,
BL=4, tRRD=2*tCK, tRCD=3*tCK, Read with
Autoprecharge
Read : A0 N A1 R0 A2 R1 A3 R2 A0 R3 A1 R0
- repeat the same timing with random address
changing; 100% of data changing at every
burst
DDR266 (133MHz, CL=2.5) : tCK=7.5ns,
CL=2.5, BL=4, tRRD=3*tCK, tRCD=3*tCK
Read with Autoprecharge
Read : A0 N A1 R0 A2 R1 A3 R2 N R3 A0 N
A1 R0 - repeat the same timing with random
address changing; 100% of data changing at
every burst
DDR266 (133MHz, CL=2) : tCK=7.5ns, CL2=2,
BL=4, tRRD=2*tCK, tRCD=2*tCK
Read : A0 N A1 R0 A2 R1 A3 R2 N R3 A0 N
A1 R0 - repeat the same timing with random
address changing; 100% of data changing at
every burst
DETAILED TEST CONDITIONS FOR DDR SDRAM IDD1 & IDD7A
Legend:
A = Activate, R = Read, W = Write, P = Precharge, N = NOP
A (0-3) = Activate Bank 0-3
R (0-3) = Read Bank 0-3


Similar Part No. - W3EG6464S263JD3

ManufacturerPart #DatasheetDescription
logo
White Electronic Design...
W3EG6464S262AD4 WEDC-W3EG6464S262AD4 Datasheet
99Kb / 9P
   512MB - 64Mx64 DDR SDRAM UNBUFFERED w/PLL
W3EG6464S262BD4 WEDC-W3EG6464S262BD4 Datasheet
99Kb / 9P
   512MB - 64Mx64 DDR SDRAM UNBUFFERED w/PLL
W3EG6464S265AD4 WEDC-W3EG6464S265AD4 Datasheet
99Kb / 9P
   512MB - 64Mx64 DDR SDRAM UNBUFFERED w/PLL
W3EG6464S265BD4 WEDC-W3EG6464S265BD4 Datasheet
99Kb / 9P
   512MB - 64Mx64 DDR SDRAM UNBUFFERED w/PLL
More results

Similar Description - W3EG6464S263JD3

ManufacturerPart #DatasheetDescription
logo
White Electronic Design...
W3EG6465S-D3 WEDC-W3EG6465S-D3 Datasheet
180Kb / 11P
   512MB - 64Mx64 DDR SDRAM UNBUFFERED
W3EG6465S-D4 WEDC-W3EG6465S-D4 Datasheet
88Kb / 8P
   512MB- 64Mx64 DDR SDRAM UNBUFFERED
WV3EG64M64ETSU-D3 WEDC-WV3EG64M64ETSU-D3 Datasheet
236Kb / 10P
   512MB - 64Mx64 DDR SDRAM UNBUFFERED
WV3EG64M64ETSU-D4 WEDC-WV3EG64M64ETSU-D4 Datasheet
177Kb / 12P
   512MB - 64Mx64 DDR SDRAM, UNBUFFERED, SO-DIMM
W3EG6464S-AD4 WEDC-W3EG6464S-AD4 Datasheet
99Kb / 9P
   512MB - 64Mx64 DDR SDRAM UNBUFFERED w/PLL
W3DG6465V-D2 WEDC-W3DG6465V-D2 Datasheet
79Kb / 6P
   512MB - 64Mx64, SDRAM UNBUFFERED
W3DG6465V-D1 WEDC-W3DG6465V-D1 Datasheet
80Kb / 5P
   512MB- 64Mx64 SDRAM UNBUFFERED
WED3DG6466V-AD1 WEDC-WED3DG6466V-AD1 Datasheet
137Kb / 7P
   512MB - 64Mx64 SDRAM UNBUFFERED
WED3DG6466V-D2 WEDC-WED3DG6466V-D2 Datasheet
147Kb / 9P
   512MB -64Mx64, SDRAM UNBUFFERED
WED3DG6466V-D1 WEDC-WED3DG6466V-D1 Datasheet
144Kb / 7P
   512MB -64Mx64 SDRAM UNBUFFERED
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com