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W3EG6465S202D3 Datasheet(PDF) 1 Page - White Electronic Designs Corporation |
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W3EG6465S202D3 Datasheet(HTML) 1 Page - White Electronic Designs Corporation |
1 / 11 page 1 W3EG6465S-D3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs PRELIMINARY* November 2005 Rev. 2 512MB – 64Mx64 DDR SDRAM UNBUFFERED DESCRIPTION The W3EDG6465S is a 64Mx64 Double Data Rate SDRAM memory module based on 128Mb DDR SDRAM components. The module consists of sixteen 64Mx4 DDR SDRAMs in 66 pin TSOP packages mounted on a 184 pin FR4 substrate. Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lengths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications. * This product is under development, is not qualified or characterized and is subject to change without notice. FEATURES Double-date-rate architecture DDR200 and DDR266 • JEDEC design specification Bi-directional data strobes (DQS) Differential clock inputs (CK CK#) Programmable Read Latency 2, 2.5 (clock) Programmable Burst Length (2,4,8) Programmable Burst type (sequential & interactive) Edge aligned data output, center aligned data input Auto and self refresh Serial presence detected Power supply: 2.5V ± 0.20V standard 184 pin DIMM package • Package height option: D3: 30.48mm (1.20") NOTE: Consult factory for availability of: • RoHS compliant products • Vendor source control options • Industrial temperature option OPERATING FREQUENCIES DDR266 @CL=2 DDR266 @CL=2.5 DDR266 @CL=2 DDR200 @CL=2 Clock Speed 133MHz 133MHz 133MHz 100MHz CL-tRCD-tRP 2-2-2 2.5-3-3 2-3-3 2-2-2 |
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