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W3EG6418S-JD3 Datasheet(PDF) 1 Page - White Electronic Designs Corporation |
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W3EG6418S-JD3 Datasheet(HTML) 1 Page - White Electronic Designs Corporation |
1 / 12 page 1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs PRELIMINARY* White Electronic Designs Corp. reserves the right to change products or specifications without notice. W3EG6418S-D3 -JD3 May 2005 Rev. 3 128MB – 16Mx64 DDR SDRAM UNBUFFERED DESCRIPTION The W3DG6418S is a 16Mx64 Double Data Rate SDRAM memory module based on 128Mb DDR SDRAM components. The module consists of eight 16Mx8 DDR SDRAMs in 66 pin TSOP package mounted on a 184 Pin FR4 substrate. Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lenths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications. * This product is under development, is not qualified or characterized and is subject to change without notice. FEATURES Double-data-rate architecture DDR200 and DDR266 • JEDEC design specifications Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2,2,5 (clock) Programmable Burst Length (2,4,8) Programmable Burst type (sequential & interleave) Edge aligned data output, center aligned data input Auto and self refresh Serial presence detect Power Supply: 2.5V ± 0.20V JEDEC standard 184 pin DIMM package • JD3 PCB height: 30.48mm (1.20") MAX NOTE: Consult factory for availability of: • Lead-free products • Vendor source control option • Industrial temperature option OPERATING FREQUENCIES DDR266 @CL=2 DDR266 @CL=2 DDR266 @CL=2.5 DDR200 @CL=2 Clock Speed 133MHz 133MHz 133MHz 100MHz CL-tRCD-tRP 2-2-2 2-3-3 2.5-3-3 2-2-2 |
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