5

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

White Electronic Designs

EDI88130CS

March 2002

Rev. 11

White Electronic Designs Corp. reserves the right to change products or specifications without notice.

ADDRESS

DATA I/O

READ CYCLE 1 (WE# HIGH; OE#, CS# LOW)

DATA 2

ADDRESS 1

ADDRESS 2

DATA 1

READ CYCLE 2 (CS1# AND/OR CS2 CONTROLLED, WE# HIGH)

ADDRESS

DATA I/O

OE#

Icc

CS1#

CS2

FIGURE 2 – TIMING WAVEFORM - READ CYCLES

FIGURE 4 – WRITE CYCLES 2

FIGURE 3 – WRITE CYCLE 1

ADDRESS

DATA IN

WRITE CYCLE 1 - LATE WRITE, WE# CONTROLLED

CS1#

DATA OUT

WE#

CS2

ADDRESS

DATA I/O

WRITE CYCLE 2 - EARLY WRITE, CS1# CONTROLLED

CS1#

WE#

CS2

ADDRESS

DATA I/O

WRITE CYCLE 3 - EARLY WRITE, CS2 CONTROLLED

CS1#

WE#

CS2

WRITE CYCLES 3