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EDI88128CXNI Datasheet(PDF) 3 Page - White Electronic Designs Corporation |
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EDI88128CXNI Datasheet(HTML) 3 Page - White Electronic Designs Corporation |
3 / 8 page 3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs EDI88128C April 2005 Rev. 17 White Electronic Designs Corp. reserves the right to change products or specifications without notice. Input Pulse Levels VSS to 3.0V Input Rise and Fall Times 5ns Input and Output Timing Levels 1.5V Output Load Figure 1 AC Test Conditions AC Characteristics – Read Cycle VCC = 5V, VSS = 0V, -55°C ≤ TA ≤ +125°C Parameter Symbol 70ns 85ns 100ns Units JEDEC Alt. Min Max Min Max Min Max Read Cycle Time tAVAV tRC 70 85 100 ns Address Access Time tAVQV tAA 70 85 100 ns Chip Select Access Time tELQV tACS 70 85 100 ns tSHQV tACS 70 85 100 ns Chip Select to Output in Low Z (1) tELQX tCLZ 333 ns tSHQX tCLZ 333 ns Chip Disable to Output in High Z (1) tEHQZ tCHZ 30 30 30 ns tSLQZ tCHZ 30 30 30 ns Output Hold from Address Change tAVQX tOH 333 ns Output Enable to Output Valid tGLQV tOE 25 30 50 ns Output Enable to Output in Low Z (1) tGLQX tOLZ 000 ns Output Disable to Output in High Z (1) tGHQZ tOHZ 030030030 ns 1. This parameter is guaranteed by design but not tested. NOTE: For tEHQZ, tGHQZ and tWLQZ, CL = 5pF Figure 2 30pF 480Ω Vcc Q Figure 1 Figure 2 255Ω 5pF 480Ω Vcc Q 255Ω |
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