EM6323LYSP5B1.8 datasheet(9/10 Pages) EMMICRO

Part #	EM6323LYSP5B1.8

Description	Reset Circuit with Manual Reset and Watchdog

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Manufacturer	EMMICRO [EM Microelectronic - MARIN SA]

Direct Link	http://www.emmicroelectronic.com

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9 / 10 page

EM6323/24

Copyright

03/06 - rev.H

9

www.emmicroelectronic.com

Watchdog Input

If the watchdog timer has not been cleared within tWD

(1.6s typ.), reset asserts. The internal 1.6s timer is

cleared by either a reset pulse or by toggling WDI. While

reset is asserted, the timer remains cleared and does not

count. As soon as reset is released, the timer starts

counting.

If the microcontroller I/O connected to WDI is put in a

high impedance condition, the circuit will detect this

condition as a microcontroller in sleep mode and prevent

its watchdog from timing out. To monitor a high

impedance or a three state condition on WDI, the

watchdog input is internally driven low during the first

15/16 of the watchdog timeout period and high for the

last 1/16 of the watchdog timeout period.

When WDI is left unconnected, this internal driver clears

the 1.6s timer every 1.5s. When WDI is three-stated or

unconnected, the maximum allowable leakage current is

0.5µA.

To minimized the overall system power consumption and

therefore for a minimum watchdog input current leave

WDI low for the majority of the watchdog timeout period,

pulsing it low-high-low once within the first 15/16 of the

watchdog timeout period to reset the watchdog timer. If

WDI is externally driven high for the majority of the

timeout period, up to 35µA can flow into WDI. Meanwhile

when the microcontroller is not in sleep mode, the output

of the microcontroller which drives WDI has to be strong

enough to fight the 35µA.

RESET

1/16 t

WD

15/16 t

WD

V

DD

t

POR

WDI Pullup OFF

ON

OFF

WDI Pulldown ON

OFF

ON

t

WD

Fig. 15

WDI Input Timing Diagram

V

DD

GND

WDI

Transition

Detector

Watchdog Logic

+ Timer

1/16 t

WD

15/16 t

WD

Pullup

Pulldown

Fig. 16

WDI Input Stage Block Schematic

0.0

3.0

6.0

9.0

12.0

15.0

-50

-25

0

25

50

75

100 125

[ °C ]

[ uA ]

Fig. 17

WDI Input Current Low-level IIL vs. Temperature

(VDD=5.5V)

0.0

5.0

10.0

15.0

20.0

25.0

-50

-25

0

25

50

75

100 125

[ °C ]

[ uA ]

Fig. 18

WDI Input Current High-Level IIH vs. Temperature

(VDD=5.5V)

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