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EM4550A6WS6 Datasheet(PDF) 5 Page - EM Microelectronic - MARIN SA |
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EM4550A6WS6 Datasheet(HTML) 5 Page - EM Microelectronic - MARIN SA |
5 / 16 page EM4450 EM4550 Copyright 2003, EM Microelectronic-Marin SA 5 www.emmicroelectronic.com Memory Organisation The 1024 bit EEPROM is organised in 32 words of 32 bits. The first three words are assigned to the Password, the Protection word, and the Control word. In order to write one of these three words, it is necessary to send the valid password. At fabrication, the EM4450/4550 comes with all bits of the password programmed to a logic "0". The Password cannot be read out. The memory contains two extra words of Laser ROM. These words are laser programmed during fabrication for every chip, are unique and cannot be altered. Memory Map Bit 0 ------------------------------ Bit 31 Word 0 PASSWORD EE Control Word Protection Word 1 PROTECTION WORD EE 0 – 7 First Word Read 0 – 7 First Word Read Protected CONTROL WORD EE 8 – 15 Last Word Read 8 – 15 Last Word Read Protected 3 EE 16 Password Check On/Off 16 – 23 First Word Write Inhibited 928 Bits of USER 17 Read After Write On/Off 24 – 31 Last Word Write Inhibited EEPROM 18 – 31 User available 31 Password 32 DEVICE SERIAL NUMBER Laser Write Only – No Read Access 33 DEVICE IDENTIFICATION Laser On means bit set to logic '1' Device Identification Word & Off means bit set to logic '0' Serial Number Word Laser Programmed – Read only Fig.5 Standard Read Mode After a Power-On-Reset and upon completion of a command, the chip will execute the Standard Read Mode, in which it will send data continuously, word by word from the memory section defined between the First Word Read (FWR) and Last Word Read (LWR). When the last word is output, the chip will continue with the first word until the transceiver sends a request. If FWR and LWR are the same, the same word will be sent repetitively. The Listen Window (LIW) is generated before each word to check if the transceiver is sending data. The LIW has a duration of 320 (160 opt 32) periods of the RF field. FWR and LWR have to be programmed as valid addresses (FWR ≤ LWR and ≤ 33). The words sent by the EM4450/4550 comprise 32 data bits and parity bits. The parity bits are not stored in the EEPROM, but generated while the message is sent as described below. The parity is even for rows and columns, meaning that the total number of "1's" is even (including the parity bit). Word organisation (Words 0 to 33) Fig. 6 When a word is read protected, the output will consist of 45 bits set to logic "0". The password has to be used to output correctly a read protected memory area. D0 D1 D2 D3 D4 D5 D6 D7 P0 D8 D9 D10 D11 D12 D13 D14 D15 P1 D16 D17 D18 D19 D20 D21 D22 D23 P2 D24 D25 D26 D27 D28 D29 D30 D31 P3 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 0 First bit output Data Row Even Parity Last bit output logic '0' Column Even Partiy |
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