EM4069

EM4169

Copyright

 2003, EM Microelectronic-Marin SA

6

www.emmicroelectronic.com

EEPROM organization

The EEPROM is organized in 8 words of 16 bits. EEPROM words are counted from 0 to 7. Bits in an EEPROM word are counted

from 0 to 15. When EEPROM readout is initiated (after POR or after return from command to read mode) read out is started from

word 0 and increments to word 7. Readout in a word is started by bit 0 and then increments up to bit 15. After word 7 bit 15 is

read readout continues with word 0 bit 0 without any pause. So it is very important to organize data written in EEPROM in a way

that reader can detect the position of bits in data stream. For Manchester encoding Word 0 and word 4 are factory programmed

and locked (see figure 7a), for BI-phase encoding the 8 words are user free (see figure 7b and 7c). Following tables show how

standard versions are factory programmed.

EEPROM Configuration for Manchester encoding (Version 1 and 11)

Word name

Bit 0

Bit 1

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

Bit 8

Bit 9

Bit 10 Bit 11 Bit 12 Bit 13 Bit 14 Bit 15

0

011

1111

1111

1101

1

1

000

1000

0000

0000

0

2

000

0000

0000

0000

0

3

000

0000

0000

0011

0

4

011

1111

1111

1101

1

5

000

1000

0000

0000

0

6

000

0000

0000

0000

0

7

000

0000

0000

0011

0

Configuration

100

0100

0111

1111

1

Fig. 7a

EEPROM Configuration for BI-phase encoding and 64 RF cycles/bit data rate (Version 21)

Word name

Bit 0

Bit 1

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

Bit 8

Bit 9

Bit 10 Bit 11 Bit 12 Bit 13 Bit 14 Bit 15

0

111

1111

1100

1000

0

1

000

1101

0000

0000

1

2

101

1100

0110

0100

1

3

010

0010

0011

0010

1

4

111

1111

1100

1000

0

5

000

1101

0000

0000

1

6

101

1100

0110

0100

1

7

010

0010

0011

0010

1

Configuration

000

0000

0111

1111

1

Fig. 7b

EEPROM Configuration for BI-phase encoding and 32 RF cycles /bit data rate (Version 31)

Word name

Bit 0

Bit 1

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

Bit 8

Bit 9

Bit 10 Bit 11 Bit 12 Bit 13 Bit 14 Bit 15

0

011

1111

1111

1101

1

1

000

1000

0000

0000

0

2

000

0000

0000

0000

0

3

000

0000

0000

0011

0

4

011

1111

1111

1101

1

5

000

1000

0000

0000

0

6

000

0000

0000

0000

0

7

000

0000

0000

0011

0

Configuration

000

0000

0111

1111

1

Fig. 7c