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COP226C Datasheet(PDF) 1 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # COP226C
Description  Single-Chip 1k and 2k CMOS Microcontrollers
Download  24 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

COP226C Datasheet(HTML) 1 Page - National Semiconductor (TI)

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TLDD8422
May 1992
COP224CCOP225CCOP226CCOP244CCOP245C
Single-Chip 1k and 2k CMOS Microcontrollers
General Description
The COP224C
COP225C
COP226C
COP244C and
COP245C fully static Single-Chip CMOS Microcontrollers
are members of the COPSTM family fabricated using dou-
ble-poly silicon gate microCMOS technology These Con-
troller Oriented Processors are complete microcomputers
containing all system timing internal logic ROM RAM and
IO necessary to implement dedicated control functions in a
variety of applications Features include single supply oper-
ation a variety of output configuration options with an in-
struction set internal architecture and IO scheme de-
signed to facilitate keyboard input display output and BCD
data manipulation The COP224C and COP244C are 28 pin
chips The COP225C and COP245C are 24-pin versions (4
inputs removed) and COP226C is 20-pin version with 15 IO
lines Standard test procedures and reliable high-density
techniques provide the medium to large volume customers
with a customized microcontroller at a low end-product cost
These microcontrollers are appropriate choices in many de-
manding control environments especially those with human
interface
COPSTM MicrobusTM and MICROWIRETM are trademarks of National Semiconductor Corp
TRI-STATE
is a registered trademark of National Semiconductor Corp
Features
Y
Lowest power dissipation (600 mW typical)
Y
Fully static (can turn off the clock)
Y
Power saving IDLE state and HALT mode
Y
44 ms instruction time
Y
2k x 8 ROM 128 x 4 RAM (COP244CCOP245C)
Y
1k x 8 ROM
64 x 4 RAM (COP224CCOP225C
COP226C)
Y
23 IO lines (COP244C and COP224C)
Y
True vectored interrupt plus restart
Y
Three-level subroutine stack
Y
Single supply operation (45V to 55V)
Y
Programmable readwrite 8-bit timerevent counter
Y
Internal binary counter register with MICROWIRETM
serial IO capability
Y
General purpose and TRI-STATE
outputs
Y
LSTTLCMOS output compatible
Y
Softwarehardware compatible with COP400 family
Y
Military temperature (b55 Cto a125 C) operation
Block Diagram
Not available on COP226C
TLDD8422 – 1
FIGURE 1
C1995 National Semiconductor Corporation
RRD-B30M105Printed in U S A


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