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DS1251Y-120 Datasheet(PDF) 3 Page - Dallas Semiconductor |
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DS1251Y-120 Datasheet(HTML) 3 Page - Dallas Semiconductor |
3 / 12 page DS1251Y 032697 3/12 PHANTOM CLOCK REGISTER INFORMATION The Phantom Clock information is contained in eight registers of 8–bits, each of which is sequentially ac- cessed one bit at a time after the 64–bit pattern recogni- tion sequence has been completed. When updating the Phantom Clock registers, each register must be han- dled in groups of 8–bits. Writing and reading individual bits within a register could produce erroneous results. These read/write registers are defined in Figure 2. Data contained in the Phantom Clock register is in binary coded decimal format (BCD). Reading and writ- ing the registers is always accomplished by stepping through all eight registers, starting with bit 0 of register 0 and ending with bit 7 of register 7. PHANTOM CLOCK REGISTER DEFINITION Figure 1 7 654 32 10 1 100 01 01 0 011 10 10 1 010 00 11 0 101 11 00 1 100 01 01 0 011 10 10 1 010 00 11 0 101 11 00 C5 3A A3 5C C5 3A A3 5C BYTE 0 BYTE 1 BYTE 2 BYTE 3 BYTE 4 BYTE 5 BYTE 6 BYTE 7 HEX VALUE NOTE: The pattern recognition in Hex is C5, 3A, A3, 5C, C5, 3A, A3, 5C. The odds of this pattern being accidentally dupli- cated and causing inadvertent entry to the Phantom Clock is less than 1 in 1019. This pattern is sent to the Phantom Clock LSB to MSB. |
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