NB3L553

http://onsemi.com

2

OE

1

0

Function

Enable

Disable

Table 1. OE, Output Enable Function

PIN DESCRIPTION

Pin #

Name

Type

Description

1

Power

Positive supply voltage (2.375 V to 5.25 V)

2

Q0

(LV)CMOS/(LV)TTL Output

Clock Output 0

3

Q1

(LV)CMOS/(LV)TTL Output

Clock Output 1

4

GND

Power

Negative supply voltage; Connect to ground, 0 V

5

ICLK

(LV)CMOS/(LV)TTL Input

Clock Input. 5.0 V tolerant

6

Q2

(LV)CMOS/(LV)TTL Output

Clock Output 2

7

Q3

(LV)CMOS/(LV)TTL Output

Clock Output 3

8

OE

(LV)CMOS/(LV)TTL Input

Output Enable for the clock outputs. Outputs are enabled when HIGH: connect to

puts when LOW.

MAXIMUM RATINGS

Symbol

Parameter

Condition 1

Condition 2

Rating

Units

Positive Power Supply

GND = 0 V

−

6.0

V

Input Voltage

−

−

GND –0.5

V

Operating Temperature Range, Industrial

−

−

≥ −40 to ≤ +85

_C

Storage Temperature Range

−

−

−65 to +150

_C

Thermal Resistance (Junction−to−Ambient)

0 LFPM

500 LFPM

SOIC−8

190

130

_C/W

_C/W

Thermal Resistance (Junction−to−Case)

(Note 1)

SOIC−8

41 to 44

_C/W

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

1. JEDEC standard multilayer board − 2S2P (2 signal, 2 power)

ATTRIBUTES

Characteristic

Value

ESD Protection

Human Body Model

Machine Model

Charged Device Model

> 2 kV

> 150 V

> TBD kV

Moisture Sensitivity, Indefinite Time Out of Drypack (Note 2)

Level 1

Flammability Rating

Oxygen Index: 28 to 34

UL−94 code V−0 @ 0.125 in

Transistor Count

531 Devices

Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test

2. For additional Moisture Sensitivity information, refer to Application Note AND8003/D.