P4C168, P4C169, P4C170
38
Mode
CE
CE
CE
CE
CE (CS
CS
CS
CS
CS)
WE
WE
WE
WE
WE
Output
Standby (Deselect)
H
X
High Z
Read
L
H
D
OUT
Write
L
L
High Z
166.5
Ω
=
R
TH
30pF(5pF* for tHZ, tLZ, tOHZ,
tOLZ, tWZ and tOW
VTH = 1.73 V
DOUT
t
t
WE
ADDRESS
CE/CS
DATA OUT
DATA IN
t WC
DATA VALID
HIGH IMPEDANCE
(12)
t AS
t CW
t AW
t WP
DW
AH
WR
t DH
t
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (
CE
CE
CE
CE
CE/CS
CS
CS
CS
CS CONTROLLED)(10)
* including scope and test fixture.
Note:
Because of the ultra-high speed of the P4C168, P4C169 AND P4C170
care must be taken when testing these devices; an inadequate setup can
cause a normal functioning part to be rejected as faulty. Long high-
inductance leads that cause supply bounce must be avoided by bringing
the V
CC and ground planes directly up to the contactor fingers. A 0.01 µF
Figure 1. Output Load
Figure 2. Thevenin Equivalent
TRUTH TABLES
P4C168 (P4C169)
P4C170
Input Pulse Levels
GND to 3.0V
Input Rise and Fall Times
3ns
Input Timing Reference Level
1.5V
Output Timing Reference Level
1.5V
Output Load
See Figures 1 and 2
AC TEST CONDITIONS
high frequency capacitor is also required between V
CC and ground. To
avoid signal reflections, proper termination must be used; for example,
a 50
Ω test environment should be terminated into a 50Ω load with 1.73V
(Thevenin Voltage) at the comparator input, and a 116
Ω resistor must be
used in series with D
OUT to match 166Ω (Thevenin Resistance).
Mode
CE
CE
CE
CE
CE
WE
WE
WE
WE
WE
OE
OE
OE
OE
OE
Output
Deselect
H
X
X
High Z
Read
L
H
L
D
OUT
Output Inhibit
L
H
H
High Z
Write
L
L
X
High Z
DOUT
255
Ω
480
Ω
300pF(5pF* for tHZ, tLZ, tOHZ,
tOLZ, tWZ and tOW)
+5