Philips Semiconductors

Product specification

74F161A, 74F163A

4-bit binary counters

1996 Jan 29

5

74F163A MODE SELECT – FUNCTION TABLE

INPUTS

OUTPUTS

OPERATING MODE

SR

CP

CEP

CET

PE

Dn

Qn

TC

OPERATING MODE

l

↑

X

X

X

X

L

L

Reset (clear)

h

↑

X

X

l

l

L

L

Parallel load

h

↑

X

X

l

h

H

(2)

Parallel load

h

↑

h

h

h

X

count

(2)

Count

h

X

l

X

h

X

(2)

Hold (do nothing)

h

X

X

l

h

X

L

Hold (do nothing)

H

=

High voltage level

h

=

High voltage level one setup prior to the Low-to-High clock transition

L

=

Low voltage level

l

=

Low voltage level one setup prior to the Low-to-High clock transition

=

Lower case letters indicate the state of the referenced output prior to the Low-to-High clock transition

X

=

Don’t care

↑

=

Low-to-High clock transition

(1)

=

The TC output is High when CET is High and the counter is at Terminal Count (HHHH for 74F161A)

(2)

=

The TC output is High when CET is High and the counter is at Terminal Count (HHHH for 74F163A)

74F161A LOGIC DIAGRAM

R

D

CP

Q

Q

R

D

CP

Q

Q

R

D

CP

Q

Q

R

D

CP

Q

Q

14

Q0

13

Q1

12

Q2

11

Q3

15

TC

6

D3

5

D2

4

D1

3

D0

7

CEP

10

CET

9

PE

1

MR

2

CP

SF00662

GND = Pin 8