Philips Semiconductors

PCKEP14

2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver

Product data

Rev. 01 — 30 October 2002

7 of 15

9397 750 09565

© Koninklijke Philips Electronics N.V. 2002. All rights reserved.

[1]

Devices are designed to meet the DC specifications shown in the above table, after thermal equilibrium has been established. The

circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 LFPM is maintained.

[2]

[3]

All loading with 50

Ω to V

[4]

[5]

differential input signal.

Table 8:

NECL DC characteristics[1]

Symbol Parameter

Conditions

Unit

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

power supply

current

45

60

75

45

60

75

45

60

95

mA

HIGH-level output

voltage

[3]

−1145 −1020 −895 −1145 −1000 −895 −1145 −990 −895 mV

LOW-level output

voltage

[3]

−1945 −1785 −1695 −1945 −1800 −1695 −1945 −1800 −1695 mV

HIGH-level input

voltage

single-ended

−1165 -

−880 −1165 -

−880 −1165 -

−880 mV

LOW-level input

voltage

single-ended

−1945 -

−1625 −1945 -

−1625 −1945 -

−1625 mV

output reference

voltage

[4]

−1425 −1335 −1235 −1435 −1335 −1235 −1415 −1320 −1230 mV

HIGH-level input

voltage, common

mode range

(differential)

[5]

0

0

0

V

HIGH-level input

current

-

-

150

-

-

150

-

-

150

µA

LOW-level input

current

CLK

0.5

-

-

0.5

-

-

0.5

-

-

µA

CLK

−150 -

-

−150 -

-

−150 -

-

µA

Table 9:

HSTL DC characteristics

Symbol Parameter

Conditions

Unit

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

HIGH-level input

voltage

1200

-

-

1200

-

-

1200

-

-

mV

LOW-level input

voltage

-

-

400

-

-

400

-

-

400

mV