1

Rev. B

01/24/05

Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time

without notice.

ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to

obtain the latest version of this device specification before relying on any published information and before placing orders for products.

IS61C1024AL

IS64C1024AL

128K x 8 HIGH-SPEED CMOS STATIC RAM

DESCRIPTION

The

low power, 131,072-word by 8-bit CMOS static RAMs. They

are fabricated using

ISSI's high-performance CMOS

technology. This highly reliable process coupled with

innovative circuit design techniques, yields higher

performance and low power consumption devices.

When

CE1 is HIGH or CE2 is LOW (deselected), the device

assumes a standby mode at which the power dissipation

can be reduced by using CMOS input levels.

Easy memory expansion is provided by using two Chip

Enable inputs,

CE1 and CE2. The active LOW Write Enable

(

WE) controls both writing and reading of the memory.

The IS61C1024AL/IS64C1024AL is available in 32-pin 300-

mil SOJ, 32-pin 400-mil SOJ, 32-pin TSOP (Type I, 8x20),

and 32-pin sTSOP (Type I, 8 x 13.4) packages.

FUNCTIONAL BLOCK DIAGRAM

A0-A16

CE1

OE

WE

128K x 8

MEMORY ARRAY

DECODER

COLUMN I/O

CONTROL

CIRCUIT

GND

VDD

I/O

DATA

CIRCUIT

I/O0-I/O7

CE2

FEATURES

• High-speed access time: 12, 15 ns

• Low active power: 160 mW (typical)

• Low standby power: 1000 µW (typical) CMOS

standby

• Output Enable (

OE) and two Chip Enable

(

CE1 and CE2) inputs for ease in applications

• Fully static operation: no clock or refresh

required

• TTL compatible inputs and outputs

• Single 5V (±10%) power supply

• Commercial, industrial, and automotive tempera-

ture ranges available

• Lead free available

JANUARY 2005