IS43R16800A-6T datasheet(6/47 Pages) ISSI

Part #	IS43R16800A-6T

Description	8Meg x 16 128-MBIT DDR SDRAM

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Manufacturer	ISSI [Integrated Silicon Solution, Inc]

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6

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. 00A

04/04/06

ISSI®

IS43R16800A-6

DC ELECTRICAL CHARACTERISTICS (1,2,3,4,5) (VDD = 2.5V +/- 0.2V, TA = 0oC to +70oC)

Symbol Parameter

Test Condition

Unit

IDD0

Operating Current

One bank operation; Active-Precharge; DQ, DM and DQS

inputs change once per clock cycle; Address and Control

inputs change once per two clock cycles; tRC = tRC (min)

110

mA

IDD1

Operating Current

One bank operation; Active-Read-Precharge; BL = 4; CL = 2.5;

Address and Control inputs change once per clock cycle;

tRCDRD = 4 x tCK; tRC = tRC (min); IOUT = 0mA;

140

mA

IDD2P

Precharge Power-Down

All banks Idle; CKE

≤ VIL

3mA

Standby Current

IDD2F

Floating Idle

CKE

≥ VIH; CS ≥ VIH; DQ, DQS, DM = VREF

35

mA

Standby Current

IDD2Q

Quiet Idle

All banks idle; Address and control inputs change once per

Standby Current

clock cycle; CKE = High;

CS = High (Deselect); VIN = VREF

for DQ, DQS, and DM; tCK = tCK (min)

30

mA

IDD3P

Active Power-Down

One bank Active; CKE = Low; tCK = tCK (min)

20

mA

Standby Current

IDD3N

Active Standby Current

One bank Active;

CS = High; CKE = High; Address and

Control inputs change once per clock cycle; DQ, DQS, and

DM change twice per clock cycle; tRC = tRC (max);

55

mA

IDD4R

Operating Current

One bank Active; CKE

≥ VIH; BL = 2; Address and Control inputs

Burst Read

change once per clock cycle; tCK = tCK (min); IOUT = 0mA;

205

mA

CL = 2.5

IDD4W

Operating Current

One bank Active; BL = 2; Address and Control inputs change

Burst Write

once per clock cycle; DQ, DQS, DM change twice per clock

cycle; CKE

≥ VIH; CL = 2.5

205

mA

IDD5

Auto Refresh Current

tRC = tRFC (min); Input

≤ VIL or ≥ VIH

200

mA

IDD6

Self Refresh Current

Input

≥ VDD-0.2V; Input ≤ 0.2V

3

mA

IDD7

Operating Current

Four bank interleaved Reads with Auto Precharge; BL = 4;

Address and Controls inputs change per Read, Write, or

Active command; one bank with tRC = tRC (min)

350

mA

Notes:

1. Operating outside the “Absolute Maximum Ratings” may lead to temporary or permanent device failure.

2. Power up sequence describe in “Initialization” section.

3. All voltages are referenced to VSS.

4. IDD tested without DQ pins connected.

5. IDD values tested with tCK = tCK (min).

CAPACITANCE CHARACTERISTICS (At TA = 0 to +25°C, VDD = VDDQ = 2.5V, f = 100 MHz)

Symbol

Parameter

Min.

Max.

Unit

CIN1

Input Capacitance: CK and

CK

23

pF

CIN2

Input Capacitance: All other input pins

2

3

pF

CIN3

Data Mask Input/Output Capacitance: LDM/UDM

3.8

4.8

pF

COUT

Data Input/Output Capacitance: DQs and LDQS/UDQS

3.8

4.8

pF

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IS43R16800A-6T Datasheet(PDF) 6 Page - Integrated Silicon Solution, Inc

IS43R16800A-6T Datasheet(HTML) 6 Page - Integrated Silicon Solution, Inc

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