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IS42VS16100C1-10TI Datasheet(PDF) 6 Page - Integrated Silicon Solution, Inc |
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IS42VS16100C1-10TI Datasheet(HTML) 6 Page - Integrated Silicon Solution, Inc |
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6 / 80 page  IS42VS16100C1 ISSI® 6 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. 00A 04/15/05 DC ELECTRICAL CHARACTERISTICS (Recommended Operation Conditions unless otherwise noted.) Symbol Parameter Test Condition Min. Max. Unit ICC1 Operating Current(1,2) One Bank Operation, CAS Latency = 3 — 35 mA Burst Length=1 tRC ≥ tRC (min.) CAS Latency = 2 — 40 IOUT = 0mA ICC2P Precharge Standby Current CKE ≤ VIL (MAX)tCK = 10 ns — 0.3 mA (In Power-Down Mode) ICC2PS Precharge Standby Current CKE ≤ VIL (MAX)tCK = ∞ — 0.3 mA (In Power-Down Mode) CLK ≤ VIL (MAX) ICC2N Active Standby Current(3) CKE ≥ VIH (MIN)tCK = 10 ns — 6 mA (In Non Power-Down Mode) CS ≥ VIH (MIN), ICC2NS Active Standby Current CKE ≥ VIH (MIN)tCK = ∞ —2 mA (In Non Power-Down Mode) Inputs are stable ICC3P Active Standby Current CKE ≤ VIL (MAX)tCK = 10 ns — 6 mA (In Non Power-Down Mode) ICC3PS Active Standby Current CKE ≤ VIL (MAX)tCK = ∞ —5 mA (In Non Power-Down Mode) CLK ≤ VIL (MAX) ICC3N Active Standby Current(3) CKE ≥ VIH (MIN)tCK = 10 ns — 12 mA (In Non Power-Down Mode) CS ≥ VIH (MIN) ICC3NS Active Standby Current CKE ≥ VIH (MIN)tCK = ∞ —10 mA (In Non Power-Down Mode) CLK ≤ VIL (MAX) Inputs are stable ICC4 Operating Current tCK = tCK (MIN) CAS latency = 2, 3 — 50 mA (In Burst Mode)(1,3) IOUT = 0mA Page Burst 4 Banks activated ICC5 Auto-Refresh Current tRC = tRC (MIN) CAS latency = 2, 3 — 40 mA ICC6 Self-Refresh Current CKE ≤ 0.2V — 170 µA Notes: 1. These are the values at the minimum cycle time. Since the currents are transient, these values decrease as the cycle time increases. Also note that a bypass capacitor of at least 0.01 µF should be inserted between VDD and Vss for each memory chip to suppress power supply voltage noise (voltage drops) due to these transient currents. 2. Icc1 and Icc4 depend on the output load. The maximum values for Icc1 and Icc4 are obtained with the output open state. 3. Inputs changed once every two clocks. |
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