Integrated Silicon Solution, Inc. — 1-800-379-4774

1

Advanced Information

Rev. 00E

06/13/06

IS25C128

IS25C256

Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time

without notice.

ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to

obtain the latest version of this device specification before relying on any published information and before placing orders for products.

128K-bit/ 256K-bit SPI SERIAL

ELECTRICALLY ERASABLE PROM

FEATURES

• Serial Peripheral Interface (SPI) Compatible

— Supports SPI Modes 0 (0,0) and 3 (1,1)

• Low power CMOS

— Active current less than 3.0 mA (2.5V)

— Standby current less than 20 µA (2.5V)

• Low-voltage Operation

— Vcc = 1.8V to 5.5V

• Block Write Protection

— Protect 1/4, 1/2, or Entire Array

• 64 byte page write mode

— Partial page writes allowed

• 2.1 MHz Clock Rate (5V)

• Self timed write cycles

— 5ms max @ 2.5V

• High-reliability

— Endurance: 1,000,000 cycles per byte

— Data retention: 100 years

• 8-pin JEDEC SOIC, 8-pin EIAJ SOIC, and 8-pin PDIP

packages available

• Industrial and Automotive temperature ranges

• Lead-free available

Advanced Information

JULY 2006

DESCRIPTION

The IS25C128 and IS25C256 are electrically erasable

PROM devices that use the Serial Peripheral Interface

(SPI) for communications. The IS25C128 is 128Kbit

(16K x 8) and the IS25C256 is 256Kbit (32K x 8). The

IS25C128/256 EEPROMs are offered in a wide

operating voltage range of 1.8V to 5.5V for compatibility

with most application voltages. ISSI designed the

IS25C128/256 to be an efficient SPI EEPROM solution.

The devices are packaged in 8-pin JEDEC SOIC, 8-pin

EIAJ SOIC, and 8-pin PDIP.

The functional features of the IS25C128/256 allow them

to be among the most advanced serial non-volatile

memories available. Each device has a Chip-Select

(

CS) pin, and a 3-wire interface of Serial Data In (SI),

Serial Data Out (SO), and Serial Clock (SCK). While

the 3-wire interface of the IS25C128/256 provides for

high-speed access, a

HOLD pin allows the memories to

ignore the interface in a suspended state; later the

HOLD pin re-activates communication without re-

initializing the serial sequence. A Status Register

facilitates a flexible write protection mechanism, and a

device-ready bit (

RDY).