Integrated Silicon Solution, Inc. — 1-800-379-4774

1

Rev. B

06/22/01

ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any

errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.

IS41C8200

IS41LV8200

FEATURES

• Extended Data-Out (EDO) Page Mode access cycle

• TTL compatible inputs and outputs

• Refresh Interval:

-- 2,048 cycles/32 ms

• Refresh Mode:

RAS-Only,

CAS-before-RAS (CBR), and Hidden

• Single power supply:

5V±10% or 3.3V ± 10%

• Byte Write and Byte Read operation via two

CAS

• Industrial temperature range -40°C to 85°C

DESCRIPTION

The

performance CMOS Dynamic Random Access Memory.

These devices offer an accelarated cycle access called

EDO Page Mode. EDO Page Mode allows 2,048 random

accesses within a single row with access cycle time as

short as 20 ns per 4-bit word.

These features make the IS41C8200 and IS41LV8200

ideally suited for high-bandwidth graphics, digital signal

processing, high-performance computing systems, and

peripheral applications.

The IS41C8200 and IS41LV8200 are packaged in 28-pin

300-mil SOJ with JEDEC standard pinouts.

2M x 8 (16-MBIT) DYNAMIC RAM

WITH EDO PAGE MODE

JUNE 2001

KEY TIMING PARAMETERS

Parameter

-50

-60

Unit

60

ns

15

ns

25

30

ns

20

25

ns

84

104

ns

PRODUCT SERIES OVERVIEW

Part No.

Refresh

Voltage

IS41C8200

2K

5V ± 10%

IS41LV8200

2K

3.3V ± 10%

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

VCC

I/O0

I/O1

I/O2

I/O3

WE

RAS

NC

A10

A0

A1

A2

A3

VCC

GND

I/O7

I/O6

I/O5

I/O4

CAS

OE

A9

A8

A7

A6

A5

A4

GND

PIN DESCRIPTIONS

A0-A10

Address Inputs

I/O0-7

Data Inputs/Outputs

WE

Write Enable

OE

Output Enable

RAS

Row Address Strobe

CAS

Column Address Strobe

Vcc

Power

GND

Ground

NC

No Connection

PIN CONFIGURATION

28 Pin SOJ