Integrated Silicon Solution, Inc. — 1-800-379-4774

1

Rev. D

06/24/01

ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any

errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.

FEATURES

– 2,048 cycles/32 ms

– 4,096 cycles/64 ms

CAS-before-RAS (CBR), and Hidden

– 5V±10% or 3.3V ± 10%

DESCRIPTION

The

CMOS

Dynamic Random Access Memory. These

devices offer an accelerated cycle access called EDO

Page Mode. EDO Page Mode allows 2,048 or 4096

random accesses within a single row with access cycle

time as short as 20 ns per 4-bit word.

These features make the 4400 Series ideally suited for

high-bandwidth graphics, digital signal processing,

high-performance computing systems, and peripheral

applications.

The 4400 Series is packaged in a 24-pin 300-mil SOJ with

JEDEC standard pinouts.

4M x 4 (16-MBIT) DYNAMIC RAM

WITH EDO PAGE MODE

JUNE, 2001

KEY TIMING PARAMETERS

Parameter

-50

-60

Unit

60

ns

15

ns

30

ns

25

ns

84

104

ns

PRODUCT SERIES OVERVIEW

Part No.

Refresh

Voltage

IS41C44002

2K

5V ± 10%

IS41C44004

4K

5V ± 10%

IS41LV44002

2K

3.3V ± 10%

IS41LV44004

4K

3.3V ± 10%

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

VCC

I/O0

I/O1

WE

RAS

*A11(NC)

A10

A0

A1

A2

A3

VCC

GND

I/O3

I/O2

CAS

OE

A9

A8

A7

A6

A5

A4

GND

* A11 is NC for 2K Refresh devices

.

PIN DESCRIPTIONS

A0-A11

Address Inputs (4K Refresh)

A0-A10

Address Inputs (2K Refresh)

I/O0-3

Data Inputs/Outputs

WE

Write Enable

OE

Output Enable

RAS

Row Address Strobe

CAS

Column Address Strobe

Vcc

Power

GND

Ground

NC

No Connection

PIN CONFIGURATION

24 Pin SOJ