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IS25C01-3ZLA3 Datasheet(PDF) 3 Page - Integrated Silicon Solution, Inc |
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IS25C01-3ZLA3 Datasheet(HTML) 3 Page - Integrated Silicon Solution, Inc |
3 / 17 page Integrated Silicon Solution, Inc. — 1-800-379-4774 3 Preliminary Information Rev. 00B 12/23/05 IS25C01 ISSI® SERIAL INTERFACE DESCRIPTION MASTER: The device that provides a clock signal. SLAVE: The IS25C01 is a slave because the clock signal is an input. TRANSMITTER/RECEIVER: The IS25C01 has both data input (SI) and data output (SO). MSB: The most significant bit. It is always the first bit transmitted or received. OP-CODE: The first byte transmitted to the slave following CS transition to LOW. If the OP-CODE is a valid member of the IS25C01 instruction set (Table 3), then it is decoded appropriately. If the OP-CODE is not valid, and the SO pin remains in high impedance. BLOCK DIAGRAM STATUS REGISTER 128 x 8 MEMORY ARRAY HOLD CS WP CLOCK SO OUTPUT BUFFER SCK SI DATA REGISTER MODE DECODE LOGIC GND VCC ADDRESS DECODER |
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