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IS25C01 Datasheet(PDF) 1 Page - Integrated Silicon Solution, Inc |
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IS25C01 Datasheet(HTML) 1 Page - Integrated Silicon Solution, Inc |
1 / 17 page Integrated Silicon Solution, Inc. — 1-800-379-4774 1 Preliminary Information Rev. 00B 12/23/05 IS25C01 ISSI® Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. 1K-BIT SPI SERIAL ELECTRICALLY ERASABLE PROM FEATURES • Serial Peripheral Interface (SPI) Compatible — Supports SPI Modes 0 (0,0) and 3 (1,1) • Low-voltage Operation — Vcc = 1.8V to 5.5V • Low power CMOS — Active current less than 3.0 mA (2.5V) — Standby current less than 1 µA (2.5V) • Block Write Protection — Protect 1/4, 1/2, or Entire Array • 8bytepagewritemode — Partial page writes allowed • 10 MHz Clock Rate (5V) • Self timed write cycles — 5 ms max. @ 2.5V • High-reliability — Endurance: 1 million cycles per byte — Data retention: 100 years • 8-pin PDIP, 8-pin SOIC, and 8-pin TSSOP packages are available • Lead-free available Preliminary Information January 2006 The IS25C01 is an electrically erasable PROM device that uses the Serial Peripheral Interface (SPI) for communications. The IS25C01 is 1Kbit (128 x 8). The IS25C01 EEPROM is offered in a wide operating voltage range of 1.8V to 5.5V to be compatible with most application voltages. ISSI designed the IS25C01 to be an efficient SPI EEPROM solution. The device is packaged in 8-pin PDIP, 8-pin SOIC, and 8-pin TSSOP. The functional features of the IS25C01 allow it to be among the most versatile serial non-volatile memories available. Each device has a Chip-Select ( CS) pin, and a 3-wire interface of Serial Data In (SI), Serial Data Out (SO), and Serial Clock (SCK). While the 3-wire inter- face of the IS25C01 provides for high-speed access, a HOLD pin allows the memories to ignore the interface in a suspended state; later the HOLD pin re-activates communication without re-initializing the serial se- quence. A Status Register facilitates a flexible write protection mechanism, and a device-ready bit ( RDY). DESCRIPTION |
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