IS41LV8512-35TI datasheet(7/18 Pages) ICSI

Part #	IS41LV8512-35TI

Description	512K x 8 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE

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Manufacturer	ICSI [Integrated Circuit Solution Inc]

Direct Link	http://www.icsi.com.tw

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IS41C8512

IS41LV8512

Integrated Circuit Solution Inc.

7

DR008-0B

AC CHARACTERISTICS (Continued)(1,2,3,4,5,6)

(Recommended Operating Conditions unless otherwise noted.)

-35

-50

-60

Symbol

Parameter

Min. Max.

Min. Max. Units

tACH

Column-Address Setup Time to CAS

15

ns

Precharge during WRITE Cycle

tOEH

OE Hold Time from WE during

8

15

ns

READ-MODI.Y-WRITE cycle(18)

tDS

Data-In Setup Time(15, 22)

0

ns

tDH

Data-In Hold Time(15, 22)

6

10

ns

tRWC

READ-MODI.Y-WRITE Cycle Time

80

100

140

ns

tRWD

RAS to WE Delay Time during

45

50

80

ns

READ-MODI.Y-WRITE Cycle(14)

tCWD

CAS to WE Delay Time(14, 20)

25

30

36

ns

tAWD

Column-Address to WE Delay Time(14)

30

49

ns

tPC

EDO Page Mode READ or WRITE

12

15

25

ns

Cycle Time(24)

tRASP

RAS Pulse Width in EDO Page Mode

35 100K

40 100K

50 100K

ns

tCPA

Access Time from CAS Precharge(15)

21

27

34

ns

tPRWC

EDO Page Mode READ-WRITE

40

45

56

ns

Cycle Time(24)

tCOH

Data Output Hold after CAS LOW

5

ns

tO..

Output Buffer Turn-Off Delay from

3

15

3

15

3

15

ns

CAS or RAS(13,15,19, 29)

tWHZ

Output Disable Delay from WE

315

3

15

315

ns

tCLCH

Last CAS going LOW to .irst CAS

10

ns

returning HIGH(23)

tCSR

CAS Setup Time (CBR RE.RESH)(30, 20)

8

10

ns

tCHR

CAS Hold Time (CBR RE.RESH)(30, 21)

8

10

ns

tORD

OE Setup Time prior to RAS during

0

ns

HIDDEN RE.RESH Cycle

tRE.

Refresh Period (1024 Cycles)

16

ms

tT

Transition Time (Rise or .all)(2, 3)

150

1

50

150

ns

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IS41LV8512-35TI Datasheet(PDF) 7 Page - Integrated Circuit Solution Inc

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