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IC41C4100-50JI Datasheet(PDF) 2 Page - Integrated Circuit Solution Inc |
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IC41C4100-50JI Datasheet(HTML) 2 Page - Integrated Circuit Solution Inc |
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2 / 21 page  IC41C4100 IC41LV4100 2 Integrated Circuit Solution Inc. DR027-0A 09/05/2001 FEATURES • Extended Data-Out (EDO) Page Mode access cycle • TTL compatible inputs and outputs; tristate I/O • Refresh Interval: 1024 cycles /16 ms • Refresh Mode: RAS-Only, CAS-before-RAS (CBR), Hidden • Single power supply: 5V ± 10% (IC41C4100) 3.3V ± 10% (IC41LV4100) • Industrail Temperature Range -40oC to 85oC DESCRIPTION The ICSI IC41C4100 and IC41LV4100 is a 1,048,576 x 4-bit high-performance CMOS Dynamic Random Access Memories. The IC41C4100 offer an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 1024 random accesses within a single row with access cycle time as short as 12 ns per 4-bit word. These features make the IC41C4100and IC41LV4100 ideally suited for, digital signal processing, high-performance audio systems, and peripheral applications. The IC41C4100 is packaged in a 20-pin 300mil SOJ and 300mil TSOP-2. 1M x 4 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE KEY TIMING PARAMETERS Parameter -35 -50 -60 Unit Max. RAS Access Time (tRAC) 355060 ns Max. CAS Access Time (tCAC) 101415 ns Max. Column Address Access Time (tAA) 182530 ns Min. EDO Page Mode Cycle Time (tPC) 122025 ns Min. Read/Write Cycle Time (tRC) 60 90 110 ns PIN DESCRIPTIONS A0-A9 Address Inputs I/O0-3 Data Inputs/Outputs WE Write Enable OE Output Enable RAS Row Address Strobe CAS Column Address Strobe Vcc Power GND Ground NC No Connection PIN CONFIGURATION 20 (26) Pin SOJ, TSOP-2 1 2 3 4 5 9 10 11 12 13 26 25 24 23 22 18 17 16 15 14 I/O0 I/O1 WE RAS A9 A0 A1 A2 A3 VCC GND I/O3 I/O2 CAS OE A8 A7 A6 A5 A4 |
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