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SCH3116I-NU Datasheet(PDF) 11 Page - SMSC Corporation

Part # SCH3116I-NU
Description  LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
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SCH3116I-NU Datasheet(HTML) 11 Page - SMSC Corporation

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LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Datasheet
SMSC SCH311X
xi
Rev 0.2 (09-28-04)
DATASHEET
List of Figures
Figure 2.1 SCH3112 Pin Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Figure 2.2 SCH3114 Pin Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2.3 SCH116 Pin Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2.4 SCH3116 Summary - 6 Ports. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 3.1 SCH311X Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 8.1 Serial Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Figure 8.2 Baud Rate Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Figure 8.3 Half Duplex Operation with Direction Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Figure 8.4 Reduce Pin Serial Port Control Signal Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Figure 12.1 SCH311X Keyboard and Mouse Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Figure 12.2 Keyboard Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
Figure 12.3 Mouse Latch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
Figure 13.1 GPIO Function Illustration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
Figure 15.1 8042 Isolation and Keyboard and Mouse Port Swap Representation . . . . . . . . . . . . . . . . . 157
Figure 18.1 Reset Generation Circuit (For Illustrative Purposes Only) . . . . . . . . . . . . . . . . . . . . . . . . . . 164
Figure 18.2 PWRGD_OUT Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
Figure 19.1 nPCIRSTx Logic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
Figure 20.1 Power Control Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
Figure 20.2 nFPRST Debounce Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172
Figure 20.3 Power Supply during Normal Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174
Figure 20.4 Power Supply After Power Failure (Return to Off) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174
Figure 20.5 Power Supply After Power Failure (Return to On) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
Figure 20.6 Sample Single-Byte Make Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
Figure 20.7 Sample Multi-Byte Make Code. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
Figure 20.8 Option 1: KB_PB_STS wake event fixed pulse width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179
Figure 20.9 Option 2: Assert KB_PB_STS wake event until scan code not programmed make code . . 179
Figure 20.10Option 3: De-assert KB_PB_STS when scan code equal break code . . . . . . . . . . . . . . . . 180
Figure 21.1 External Battery Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183
Figure 23.1 HWM Block Embedded in SCH311X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
Figure 23.2 HWM Register Access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188
Figure 23.3 Interrupt Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
Figure 23.4 Automatic Fan Control Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202
Figure 23.5 Automatic Fan Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204
Figure 23.6 Spin Up Reduction Enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205
Figure 23.7 Illustration of PWM Ramp Rate Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207
Figure 23.8 AMTA Illustration, Adjusting Minimum Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
Figure 23.9 AMTA Interrupt Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216
Figure 23.10nTHERMTRIP Output Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
Figure 23.11PWM and Tachometer Concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
Figure 24.1 Fan Activity Above Fan Temp Limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244
Figure 29.1 Power-Up Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 348
Figure 29.2 Input Clock Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 348
Figure 29.3 PCI Clock Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 349
Figure 29.4 Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 349
Figure 29.5 Output Timing Measurement Conditions, LPC Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350
Figure 29.6 Input Timing Measurement Conditions, LPC Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350
Figure 29.7 I/O Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
Figure 29.8 I/O Read. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
Figure 29.9 DMA Request Assertion through LDRQ#. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
Figure 29.10DMA Write (First Byte) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
Figure 29.11DMA Read (First Byte) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
Figure 29.12Floppy Disk Drive Timing (AT Mode Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 352
Figure 29.13EPP 1.9 Data or Address Write Cycle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 353


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