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NCP1526 Datasheet(PDF) 10 Page - ON Semiconductor |
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NCP1526 Datasheet(HTML) 10 Page - ON Semiconductor |
10 / 16 page NCP1526 http://onsemi.com 10 DC−DC OPERATION DESCRIPTION Detailed Description The NCP1526 uses a constant frequency, voltage mode step−down architecture. Both the main (P−Channel MOSFET) and synchronous (N−Channel MOSFET) switches are internal. It delivers a constant voltage from either a single Li−Ion or three cell NiMH/NiCd battery to portable devices such as cell phones and PDA. The output voltage accuracy is well within 3% of the 1.20 V. The NCP1526 can source at least 400 mA. PWM Operating Mode The output voltage of NCP1526 is regulated by modulating the on−time pulse width of the main switch Q1 at a fixed 3.0 MHz frequency. The switching of the PMOS Q1 is controlled by a flip−flop driven by the internal oscillator and a comparator that compares the error signal from an error amplifier with the PWM ramp. At the beginning of each cycle, the main switch Q1 is turned ON by the rising edge of the internal oscillator clock. When the PWM ramp becomes higher than the error voltage amplifier the PWM comparator resets the flip−flop, Q1 is turned OFF and the synchronous switch Q2 is turned ON. Q2 replaces the external Schottky diode to reduce the conduction loss and improve the efficiency. To avoid overall power loss, a certain amount of dead time is introduced to ensure Q1 is completely turned OFF before Q2 is being turned ON. Vin IPFET IL INFET VO VLX 3.6040 3.6000 3.5960 400 m 200 m 0.00 400 m 300 m 200 m 400 m 100 m −200 m 1.205 1.200 1.195 3.70 1.35 −1.00 Figure 24. Waveforms During PWM Operation Soft−Start The NCP1526 uses soft−start to limit the inrush current when the device is initially powered up or enabled. Soft−start is implemented by gradually increasing the reference voltage until it reaches the full reference voltage. During startup, a pulsed current source charges the internal soft−start capacitor to provide gradually increasing reference voltage. When the voltage across the capacitor ramps up to the nominal reference voltage, the pulsed current source will be switched off and the reference voltage will switch to the regular reference voltage. Cycle−by−Cycle Current Limitation From the block diagram (Figure 2), an ILIM comparator is used to realize cycle−by−cycle current limit protection. The comparator compares the LX pin voltage with the reference voltage, which is biased by a constant current. If the inductor current reaches the limit, the ILIM comparator detects the LX voltage falling below the reference voltage and releases the signal to turn off the switch Q1. The cycle−by−cycle current limit is set at 1000 mA (nom). |
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