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IDT70V15L15PF Datasheet(PDF) 10 Page - Integrated Device Technology |
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IDT70V15L15PF Datasheet(HTML) 10 Page - Integrated Device Technology |
10 / 18 page 6.42 IDT70V16/5S/L High-Speed 3.3V 16/8K x 9 Dual-Port Static RAM Industrial and Commercial Temperature Ranges 10 PRELIMINARYPRE PRELIMINARY Timing Waveform of Semaphore Read after Write Timing, Either Side(1) NOTES: 1. DOR = DOL =VIH, CER = CEL =VIH. 2. All timing is the same for left and right ports. Port“A” may be either left or right port. “B” is the opposite port from “A”. 3. This parameter is measured from R/ W“A” or SEM“A” going HIGH to R/W“B” or SEM“B” going HIGH. 4. If tSPS is not satisfied, there is no guarantee which side will obtain the semaphore flag. Timing Waveform of Semaphore Write Condition(1,3,4) NOTES: 1. CE = VIH for the duration of the above timing (both write and read cycle). 2. “DATAOUT VALID” represents all I/O's (I/O0-I/O8) equal to the semaphore value. SEM 5669 drw 10 tAW tSOP I/O VALID ADDRESS tSAA R/ W tWR tOH tACE VALID ADDRESS DATAIN VALID DATAOUT tDW tDH tAS tAOE Read Cycle Write Cycle A0-A2 OE VALID(2) tSWRD tEW tWP SEM"A" 5669 drw 11 tSPS MATCH R/ W"A" MATCH A0"A"-A2"A" SIDE "A" (2) SEM"B" R/W"B" SIDE "B" (2) A0"B"-A2"B" |
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