PROFET® ITS 640S2

Infineon Technologies AG

Page 7

2006-Mar-28

Truth Table

Input

Output

Status

Current

Sense

level

level

level

IIS

Normal

operation

L

H

L

H

H

L

0

nominal

Current-

limitation

L

H

L

H

H

H

0

0

Short circuit to

GND

L

H

L

H

H

0

0

Over-

temperature

L

H

L

L

H

H

0

0

Short circuit to

L

H

H

H

L

0

Open load

L

H

H

L

0

0

Undervoltage

L

H

L

L

H

L

0

0

Overvoltage

L

H

L

L

H

L

0

0

Negative output

voltage clamp

L

L

H

0

L = "Low" Level

X = don't care

Z = high impedance, potential depends on external circuit

H = "High" Level

Status signal after the time delay shown in the diagrams (see fig 5. page 11...12)

15

zero

17

18

) Power Transistor off, high impedance

19

) with external resistor between pin 4 and pin 6&7

Terms

PROFET

V

IS

ST

OUT

GND

bb

VST

V

IN

I ST

I IN

V

bb

Ibb

IGND

6

2

4

3

5

IN

VIS

I IS

V

OUT

VON

I L

OUT

1

7

R

GND

Input circuit (ESD protection)

IN

GND

I

R

ESD-ZD

I

I

I

The use of ESD zener diodes as voltage clamp at DC

conditions is not recommended.