Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

CY7C1370B-167AI Datasheet(PDF) 9 Page - Cypress Semiconductor

Part # CY7C1370B-167AI
Description  512K36/1M 횞 18 Pipelined SRAM with NoBL Architecture
Download  27 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C1370B-167AI Datasheet(HTML) 9 Page - Cypress Semiconductor

Back Button CY7C1370B-167AI Datasheet HTML 5Page - Cypress Semiconductor CY7C1370B-167AI Datasheet HTML 6Page - Cypress Semiconductor CY7C1370B-167AI Datasheet HTML 7Page - Cypress Semiconductor CY7C1370B-167AI Datasheet HTML 8Page - Cypress Semiconductor CY7C1370B-167AI Datasheet HTML 9Page - Cypress Semiconductor CY7C1370B-167AI Datasheet HTML 10Page - Cypress Semiconductor CY7C1370B-167AI Datasheet HTML 11Page - Cypress Semiconductor CY7C1370B-167AI Datasheet HTML 12Page - Cypress Semiconductor CY7C1370B-167AI Datasheet HTML 13Page - Cypress Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 27 page
background image
CY7C1370B
CY7C1372B
Document #: 38-05197 Rev. **
Page 9 of 27
Sleep Mode
The ZZ input pin is an asynchronous input. Asserting ZZ
places the SRAM in a power conservation “sleep” mode. Two
clock cycles are required to enter into or exit from this “sleep”
mode. While in this mode, data integrity is guaranteed.
Accesses pending when entering the “sleep” mode are not
considered valid nor is the completion of the operation
guaranteed. The device must be deselected prior to entering
the “sleep” mode. CEs, ADSP, and ADSC must remain
inactive for the duration of tZZREC after the ZZ input returns
LOW.
ZZ Mode Electrical Characteristics
Parameter
Description
Test Conditions
Min.
Max.
Unit
IDDZZ
Sleep mode standby current
ZZ > VDD – 0.2V
20
mA
tZZS
Device operation to ZZ
ZZ > VDD – 0.2V
2tCYC
ns
tZZREC
ZZ recovery time
ZZ < 0.2V
2tCYC
ns
Write Cycle Descriptions[1, 2]
Function (CY7C1370B)
WE
BWSd
BWSc
BWSb
BWSa
Read
1
X
X
X
X
Write - No bytes written
0
1
1
1
1
Write Byte 0 - (DQa and DPa)
01
11
0
Write Byte 1 - (DQb and DPb)
01
10
1
Write Bytes 1, 0
0
11
00
Write Byte 2 - (DQc and DPc)
01
01
1
Write Bytes 2, 0
0
10
10
Write Bytes 2, 1
0
10
01
Write Bytes 2, 1, 0
0
1
0
0
0
Write Byte 3 - (DQd and DPd)
00
11
1
Write Bytes 3, 0
0
01
10
Write Bytes 3, 1
0
01
01
Write Bytes 3, 1, 0
0
0
1
0
0
Write Bytes 3, 2
0
00
11
Write Bytes 3, 2, 0
0
0
0
1
0
Write Bytes 3, 2, 1
0
0
0
0
1
Write All Bytes
0
0
0
0
0
Function (CY7C1372B)
WE
BWSb
BWSa
Read
1
x
x
Write - No Bytes Written
0
1
1
Write Byte 0 - (DQa and DPa)
0
1
0
Write Byte 1 - (DQb and DPb)
0
0
1
Write Both Bytes
0
0
0


Similar Part No. - CY7C1370B-167AI

ManufacturerPart #DatasheetDescription
logo
Cypress Semiconductor
CY7C1370BV25 CYPRESS-CY7C1370BV25 Datasheet
726Kb / 26P
   512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture
CY7C1370BV25-133AC CYPRESS-CY7C1370BV25-133AC Datasheet
726Kb / 26P
   512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture
CY7C1370BV25-133AI CYPRESS-CY7C1370BV25-133AI Datasheet
726Kb / 26P
   512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture
CY7C1370BV25-133BGC CYPRESS-CY7C1370BV25-133BGC Datasheet
726Kb / 26P
   512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture
CY7C1370BV25-133BGI CYPRESS-CY7C1370BV25-133BGI Datasheet
726Kb / 26P
   512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture
More results

Similar Description - CY7C1370B-167AI

ManufacturerPart #DatasheetDescription
logo
Cypress Semiconductor
CY7C1370KV25 CYPRESS-CY7C1370KV25 Datasheet
2Mb / 30P
   18-Mbit (512K 횞 36/1M 횞 18) Pipelined SRAM with NoBL??Architecture
CY7C1370KV33 CYPRESS-CY7C1370KV33 Datasheet
999Kb / 32P
   18-Mbit (512K 횞 36/1M 횞 18) Pipelined SRAM with NoBL??Architecture (With ECC)
CY7C1460SV25 CYPRESS-CY7C1460SV25 Datasheet
429Kb / 31P
   36-Mbit (1M 횞 36/2M 횞 18) Pipelined SRAM with NoBL??Architecture
CY7C1460KV25 CYPRESS-CY7C1460KV25 Datasheet
830Kb / 32P
   36-Mbit (1M 횞 36/2M 횞 18) Pipelined SRAM with NoBL??Architecture (With ECC)
CY7C1460KV33 CYPRESS-CY7C1460KV33 Datasheet
1,010Kb / 31P
   36-Mbit (1M 횞 36/2M 횞 18) Pipelined SRAM with NoBL??Architecture (With ECC)
CY7C1380KV33 CYPRESS-CY7C1380KV33 Datasheet
3Mb / 33P
   18-Mbit (512K 횞 36/1M 횞 18) Pipelined SRAM
CY7C1371KV33 CYPRESS-CY7C1371KV33 Datasheet
682Kb / 24P
   18-Mbit (512K 횞 36/1M 횞 18) Flow-Through SRAM with NoBL??Architecture (With ECC)
CY7C1461KV33 CYPRESS-CY7C1461KV33 Datasheet
2Mb / 23P
   36-Mbit (1M 횞 36/2M 횞 18) Flow-Through SRAM with NoBL??Architecture
CY7C1370CV25 CYPRESS-CY7C1370CV25 Datasheet
712Kb / 27P
   512K x 36/1M x 18 Pipelined SRAM with NoBL??Architecture
CY7C1386KV33 CYPRESS-CY7C1386KV33 Datasheet
390Kb / 23P
   18-Mbit (512K 횞 36/1M 횞 18) Pipelined DCD Sync SRAM
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com