CY7C1360A
CY7C1362A
Document #: 38-05258 Rev. *A
Page 9 of 28
Notes:
3.
X = “Don’t Care.” H = logic HIGH. L = logic LOW.
For X36 product, Write = L means [BWE + BWa*BWb*BWc*BWd]*GW equals LOW. Write = H means [BWE + BWa*BWb*BWc*BWd]*GW equals HIGH.
For X18 product, Write = L means [BWE + BWa*BWb]*GW equals LOW. Write = H means [BWE + BWa*BWb]*GW equals HIGH.
4.
BWa enables Write to DQa. BWb enables Write to DQb. BWc enables Write to DQc. BWd enables Write to DQd.
5.
All inputs except OE must meet set-up and hold times around the rising edge (LOW to HIGH) of CLK.
6.
Suspending burst generates wait cycle.l
7.
For a Write operation following a Read operation, OE must be HIGH before the input-data-required set-up time plus High-Z time for OE and staying HIGH
throughout the input data hold time.
8.
This device contains circuitry that will ensure the outputs will be in High-Z during power-up.
9.
ADSP LOW along with chip being selected always initiates a Read cycle at the L-H edge of CLK. A Write cycle can be performed by setting Write LOW for the
CLK L-H edge of the subsequent wait cycle. Refer to Write timing diagram for clarification.
Burst Address Table (MODE = NC/VCC)
First
Address (ex-
ternal)
Second
Address
(internal)
Third
Address
(internal)
Fourth
Address
(internal)
A[1:0]]
A[1:0]
A[1:0]
A[1:0]
00
01
10
11
01
00
11
10
10
11
00
01
11
10
01
00
Burst Address Table (MODE = GND)
First
Address
(external)
Second
Address
(internal)
Third
Address
(internal)
Fourth
Address
(internal)
A[1:0]]
A[1:0]
A[1:0]
A[1:0]
00
01
10
11
01
10
11
00
10
11
00
01
11
00
01
10
Truth Table[3, 4, 5, 6, 7, 8, 9]
Next Cycle
Address Used
ZZ
CE3
CE2 CE1 ADSP ADSC ADV
OE
DQ
DQ
Unselected
None
O
X
X
1
X
0
X
X
Hi-Z
X
Unselected
None
O
1
X
0
0
X
X
X
Hi-Z
X
Unselected
None
O
X
0
0
0
X
X
X
Hi-Z
X
Unselected
None
O
1
X
0
1
0
X
X
Hi-Z
X
Unselected
None
O
X
0
0
1
0
X
X
Hi-Z
X
Begin Read
External
O
0
1
0
0
X
X
X
Hi-Z
X
Begin Read
External
O
0
1
0
1
0
X
X
Hi-Z
Read
Continue Read
Next
O
X
X
X
1
1
0
1
Hi-Z
Read
Continue Read
Next
O
X
X
X
1
1
0
0
DQ
Read
Continue Read
Next
O
X
X
1
X
1
0
1
Hi-Z
Read
Continue Read
Next
O
X
X
1
X
1
0
0
DQ
Read
Suspend Read
Current
O
X
X
X
1
1
1
1
Hi-Z
Read
Suspend Read
Current
O
X
X
X
1
1
1
0
DQ
Read
Suspend Read
Current
O
X
X
1
X
1
1
1
Hi-Z
Read
Suspend Read
Current
O
X
X
1
X
1
1
0
DQ
Read
Begin Write
Current
O
X
X
X
1
1
1
X
Hi-Z
Write
Begin Write
Current
O
X
X
1
X
1
1
X
Hi-Z
Write
Begin Write
External
O
0
1
0
1
0
X
X
Hi-Z
Write
Continue Write
Next
O
X
X
X
1
1
0
X
Hi-Z
Write
Continue Write
Next
O
X
X
1
X
1
0
X
Hi-Z
Write
Suspend Write
Current
O
X
X
X
1
1
1
X
Hi-Z
Write
Suspend Write
Current
O
X
X
1
X
1
1
X
Hi-Z
Write
ZZ “sleep”
None
1
X
X
X
X
X
X
X
Hi-Z
X
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