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ADG3242BRJ-REEL Datasheet(PDF) 3 Page - Analog Devices |
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ADG3242BRJ-REEL Datasheet(HTML) 3 Page - Analog Devices |
3 / 12 page REV. 0 ADG3242 –3– ABSOLUTE MAXIMUM RATINGS * (TA = 25 °C, unless otherwise noted.) VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to +4.6 V Digital Inputs to GND . . . . . . . . . . . . . . . . . –0.5 V to +4.6 V DC Input Voltage . . . . . . . . . . . . . . . . . . . . . –0.5 V to +4.6 V DC Output Current . . . . . . . . . . . . . . . . . 25 mA per Channel Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . . . –40 °C to +85°C Storage Temperature Range . . . . . . . . . . . . –65 °C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150 °C JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 206 °C/Ω Lead Temperature, Soldering (10 sec) . . . . . . . . . . . . . 300 °C IR Reflow, Peak Temperature (<20 sec) . . . . . . . . . . . . 235 °C *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. PIN CONFIGURATION 8-Lead SOT-23 TOP VIEW (Not to Scale) 8 7 6 5 1 2 3 4 ADG3242 GND A1 BE B0 SEL VCC A0 B1 ORDERING GUIDE Model Temperature Range Package Description Package Branding ADG3242BRJ-R2 –40 °C to +85°CSOT-23 (Small Outline Transistor) RJ-8 SCA ADG3242BRJ-REEL –40 °C to +85°CSOT-23 (Small Outline Transistor) RJ-8 SCA ADG3242BRJ-REEL7 –40 °C to +85°CSOT-23 (Small Outline Transistor) RJ-8 SCA CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG3242 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Table I. Truth Table BE SEL* Function LL A0 = B0, A1 = B1, 3.3 V to 1.8 V Level Shifting LH A0 = B0, A1 = B1, 3.3 V to 2.5 V/2.5 V to 1.8 V Level Shifting HX Disconnect *SEL = 0 V only when VDD = 3.3 V ± 10%. PIN FUNCTION DESCRIPTIONS Pin No. Mnemonic Description 1 BE Bus Enable (Active Low) 2A0 Port A0, Input or Output 3A1 Port A1, Input or Output 4GND Ground Reference 5B1 Port B1, Input or Output 6B0 Port B0, Input or Output 7 SEL Level Translation Select 8VCC Positive Power Supply Voltage |
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