SN74AUC2G34DRLRG4 datasheet(3/13 Pages) TI

Part #	SN74AUC2G34DRLRG4

Description	Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation

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Manufacturer	TI [Texas Instruments]

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Recommended Operating Conditions

(1)

SN74AUC2G34

DUAL BUFFER GATE

SCES514A – NOVEMBER 2003 – REVISED MARCH 2006

MIN

MAX

UNIT

VCC

Supply voltage

0.8

2.7

V

VCC = 0.8 V

VCC

VIH

High-level input voltage

VCC = 1.1 V to 1.95 V

0.65 × VCC

V

VCC = 2.3 V to 2.7 V

1.7

VCC = 0.8 V

0

VIL

Low-level input voltage

VCC = 1.1 V to 1.95 V

0.35 × VCC

V

VCC = 2.3 V to 2.7 V

0.7

VI

Input voltage

0

3.6

V

VO

Output voltage

0

VCC

V

VCC = 0.8 V

–0.7

VCC = 1.1 V

–3

IOH

High-level output current

VCC = 1.4 V

–5

mA

VCC = 1.65 V

–8

VCC = 2.3 V

–9

VCC = 0.8 V

0.7

VCC = 1.1 V

3

IOL

Low-level output current

VCC = 1.4 V

5

mA

VCC = 1.65 V

8

VCC = 2.3 V

9

VCC = 0.8 V to 1.65 V(2)

20

∆t/∆v

Input transition rise or fall rate

VCC = 1.65 V to 1.95 V(3)

20

ns/V

VCC = 2.3 V to 2.7 V(3)

10

TA

Operating free-air temperature

–40

85

°C

(1)

All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

(2)

The data was taken at CL = 15 pF, RL = 2 kΩ (see Figure 1).

(3)

The data was taken at CL = 30 pF, RL = 500 Ω (see Figure 1).

3

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