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74ABTL3205BB Datasheet(PDF) 2 Page - NXP Semiconductors |
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74ABTL3205BB Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 14 page Philips Semiconductors Product specification 74ABTL3205 10-bit BTL transceiver with registers 2 1995 Jun 16 853-1802 15352 FEATURES • 10-bit BTL transceiver • Drives heavily loaded backplanes with equivalent load impedances down to 10 ohms • High drive 100mA BTL open collector drivers on B-port • Allows incident wave switching in heavily loaded backplane buses • Reduced BTL voltage swing produces less noise and reduces power consumption • Built-in precision band-gap reference provides accurate receiver thresholds and improved noise immunity • Compatible with IEEE Futurebus+ or proprietary BTL backplanes • Controlled output ramp and multiple GND pins minimize ground bounce • Tight output skew (0.5nsec typical) • Glitch-free power up/down operation • Low I CC current • Supports live insertion • High density packaging • ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model DESCRIPTION This transceiver is a 10 bit bidirectional transceiver and is intended to provide the electrical interface to a high performance wired-OR bus. The B-port drivers are Low-capacitance open collectors with controlled ramp and are designed to sink 100mA. Precision band gap references on the B-port insure very good margins by limiting the switching threshold to a narrow region centered at 1.55V. The B-port interfaces to “Backplane Transceiver Logic” (See the IEEE 1194.1 BTL standard). BTL features low power consumption by reducing voltage swing (1V p-p, between 1V and 2V) and reduced capacitive loading (<6pF) by placing an internal series diode on the drivers. BTL also provides incident wave switching, a necessity for high performance backplanes. To support live insertion, OEB is held Low during power on/off cycles to insure glitch free B port drivers. Proper bias for B port drivers during live insertion is provided by the BIAS V pin when at a 5V level while VCC is Low. The BIAS V pin is a low current input which will reverse bias the BTL driver series Schottky diode, and also bias the B port output pins to a voltage between 1.62V and 2.1V. This bias function is in accordance with IEEE BTL standard 1194.1. If live insertion is not a requirement, the BIAS V pin should be tied to a VCC pin. The LOGIC GND and BUS GND pins are isolated inside the package to minimize noise coupling between the BTL and TTL sides. These pins should be tied to a common ground external to the package. The LOGIC VCC and BUS VCC pins are also isolated internally to minimize noise and may be externally decoupled separately or simply tied together. This transceiver function is intended to operate in a half-duplex mode. Low current in standby mode is obtained by powering down unused circuitry. Likewise, transmit circuitry is powered down when in receive mode and receive circuitry is powered down while in transmit mode. QUICK REFERENCE DATA SYMBOL PARAMETER TYPICAL UNIT tPLH Propagation delay 3.3 ns tPHL An to Bn 3.7 ns tPLH Propagation delay 3.6 ns tPHL Bn to An 3.5 ns COB Output capacitance (B0 - B8) only) 6 pF IOL Output current (B0 - B8) only) 100 mA Standby 1 ICC Supply current An to Bn 7 mA Bn to An 18 ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 52-PIN PQFP –40 °C to +85°C 74ABTL3205 BB 74ABTL3205 BB SOT379-1 |
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