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AS4C4M4F0-50TI Datasheet(PDF) 1 Page - Alliance Semiconductor Corporation |
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AS4C4M4F0-50TI Datasheet(HTML) 1 Page - Alliance Semiconductor Corporation |
1 / 18 page Copyright © Alliance Semiconductor. All rights reserved. ® AS4C4M4F0 AS4C4M4F1 5V 4M×4 CMOS DRAM (Fast Page mode) 4/11/01; v.0.9 Alliance Semiconductor P. 1 of 18 Features • Organization: 4,194,304 words × 4 bits • High speed - 50/60 ns RAS access time - 25/30 ns column address access time - 12/15 ns CAS access time • Low power consumption - Active: 908 mW max - Standby: 5.5 mW max, CMOS I/O •Fast page mode •Refresh - 4096 refresh cycles, 64 ms refresh interval for AS4C4M4F0 - 2048 refresh cycles, 32 ms refresh interval for AS4C4M4F1 -RAS-only or CAS-before-RAS refresh or self-refresh • TTL-compatible, three-state I/O • JEDEC standard package - 300 mil, 24/26-pin SOJ - 300 mil, 24/26-pin TSOP • Latch-up current ≥ 200 mA • ESD protection ≥ 2000 mV • Industrial and commercial temperature available Pin arrangement A8 A7 A6 A5 A4 A10 A0 A1 A2 A3 VCC GND GND I/O3 I/O2 CAS OE VCC I/O0 I/O1 WE RAS 1 2 3 4 5 26 25 24 23 22 *NC/A11 A9 621 8 9 10 11 18 17 16 15 14 12 SOJ A8 A7 A6 A5 A4 A10 A0 A1 A2 A3 VCC GND GND I/O3 I/O2 CAS OE VCC I/O0 I/O1 WE RAS 1 2 3 4 5 *NC/A11 A9 6 TSOP *NC on 2K refresh version; A11 on 4K refresh version 13 19 Pin designation Pin(s) Description A0 to A11 Address inputs RAS Row address strobe CAS Column address strobe WE Write enable I/O0 to I/O3 Input/output OE Output enable VCC Power GND Ground Selection guide Symbol AS4C4M4F0-50 AS4C4M4F1-50 AS4C4M4F0-60 AS4C4M4F1-60 Unit Maximum RAS access time tRAC 50 60 ns Maximum column address access time tCAA 25 30 ns Maximum CAS access time tCAC 12 15 ns Maximum output enable (OE) access time tOEA 13 15 ns Minimum read or write cycle time tRC 85 100 ns Minimum fast page mode cycle time tPC 25 30 ns Maximum operating current ICC1 135 120 mA Maximum CMOS standby current ICC5 1.0 1.0 mA 8 9 10 11 12 13 18 17 16 15 14 19 26 25 24 23 22 21 |
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