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GS8342T09GE-300 Datasheet(PDF) 11 Page - GSI Technology |
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GS8342T09GE-300 Datasheet(HTML) 11 Page - GSI Technology |
11 / 37 page Kn LD R/W DQ Operation A + 0 A + 1 ↑ 1 X Hi-Z Hi-Z Deselect ↑ 0 0 D@Kn+1 D@Kn+1 Write ↑ 0 1 Q@Kn+1 or Cn+1 Q@Kn+2 or Cn+2 Read Note: Q is controlled by K clocks if C clocks are not used. Preliminary GS8342T08/09/18/36E-333/300/267*/250/200/167 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Rev: 1.02 8/2005 11/37 © 2003, GSI Technology Common I/O SigmaCIO DDR-II B2 SRAM Truth Table B2 Byte Write Clock Truth Table BW BW Current Operation D D K ↑ (tn+1) K ↑ (tn+2) K ↑ (tn) K ↑ (tn+1) K ↑ (tn+2) T T Write Dx stored if BWn = 0 in both data transfers D1 D2 T F Write Dx stored if BWn = 0 in 1st data transfer only D1 X F T Write Dx stored if BWn = 0 in 2nd data transfer only X D2 F F Write Abort No Dx stored in either data transfer X X Notes: 1. “1” = input “high”; “0” = input “low”; “X” = input “don’t care”; “T” = input “true”; “F” = input “false”. 2. If one or more BWn = 0, then BW = “T”, else BW = “F”. |
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