Philips Semiconductors

Product specification

74ABT16652

74ABTH16652

16-bit transceiver/register, non-inverting (3-State)

1998 Feb 27

7

DC ELECTRICAL CHARACTERISTICS

LIMITS

SYMBOL

PARAMETER

TEST CONDITIONS

to +85

°C

UNIT

MIN

TYP

MAX

MIN

MAX

Input clamp voltage

–0.9

–1.2

–1.2

V

2.5

2.9

2.5

V

High-level output voltage

3.0

4.0

3.0

V

2.0

2.4

2.0

V

Low-level output voltage

0.35

0.55

0.55

V

Power-up output low

0.13

0.55

0.55

V

I

Input leakage current

V

55V; V

GND or V

Control

±001

±10

±10

A

Input leakage current

Control

pins

±0.01

±1.0

±1.0

µA

B

H ld

t A

B

35

35

Bus Hold current A or B

–75

–75

µA

±800

Power-off leakage current

±1.0

±100

±100

µA

Power-up/down 3-State

±1.0

±50

±50

µA

3-State output High current

1.0

10

10

µA

3-State output Low current

–1.0

–10

–10

µA

Output High leakage current

5.0

50

50

µA

–50

–80

–180

–50

–180

mA

0.5

2

2

mA

Quiescent supply current

8

19

19

mA

0.5

2

2

mA

Additional supply current

74ABT16652

5.0

50

50

µA

Additional supply current

74ABTH16652

200

500

500

µA

NOTES:

1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.

2. This is the increase in supply current for each input at 3.4V.

3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.

function with respect to all input logic states.

5. This is the bus hold overdrive current required to force the input to the opposite logic state.