 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
XRT91L82IB Datasheet(PDF) 1 Page - Exar Corporation |
|
||||||||||||||||||||||||||||||
XRT91L82IB Datasheet(HTML) 1 Page - Exar Corporation |
|
|
1 / 59 page  Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com xr xr xr xr PRELIMINARY XRT91L82 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER APRIL 2005 REV. P1.0.5 GENERAL DESCRIPTION The XRT91L82 is a fully integrated SONET/SDH transceiver for OC-48/STM16 applications supporting the use of Forward Error Correction (FEC) capability. The transceiver includes an on-chip Clock Multiplier Unit (CMU), which uses a high frequency Phase- Locked Loop (PLL) to generate the high-speed transmit serial clock from slower external clock references. It also provides Clock and Data Recovery (CDR) functions by synchronizing its on-chip Voltage Controlled Oscillator (VCO) to the incoming serial data stream. The chip provides serial-to-parallel and parallel-to-serial converters and 16-bit Differential LVDS/LVPECL, or Single-Ended LVPECL system interfaces in both receive and transmit directions. The transmit section includes a 16x9 Elastic Buffer (FIFO) to absorb any phase differences between the transmitter clock input and the internally generated transmitter reference clock. In the event of an overflow, an internal FIFO control circuit outputs an OVERFLOW indication. The FIFO under the control of the FIFO_AUTORST register bit can automatically recover from an overflow condition. The operation of the device can be monitored by checking the status of the LOCKDET_CMU and LOCKDET_CDR output signals. An on-chip phase/frequency detector and charge-pump offers the ability to form a de-jittering PLL with an external VCXO that can be used in loop timing mode to clean up the recovered clock in the receive section. APPLICATIONS • SONET/SDH-based Transmission Systems • Add/Drop Multiplexers • Cross Connect Equipment • ATM and Multi-Service Switches, Routers and Switch/Routers • DSLAMS • SONET/SDH Test Equipment • DWDM Termination Equipment FIGURE 1. BLOCK DIAGRAM OF XRT91L82 PISO (Parallel Input Serial Output) PFD & Charge Pump Serial Microprocessor Hardware Control TXDI[15:0]P/N TXPCLKIP/N DLOOP RLOOPP RXDO[15:0]P/N RXPCLKOP/N WP RP SIPO (Serial Input Parallel Output) RLOOPS CDR Re-Timer CMU TXOP/N RXIP/N TXPCLKOP/N TXCLKO16P/N TXCLKO16SEL FIFO_RST DISRDCLK DISRD STS-48 TRANSCEIVER JTAG TDO TDI TCK TMS TRST 16 16 Div by 16 Div by 16 TXSCLKOP/N OVERFLOW |
Similar Part No. - XRT91L82IB |
|
Similar Description - XRT91L82IB |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
