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XRT56L85D Datasheet(PDF) 1 Page - Exar Corporation |
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XRT56L85D Datasheet(HTML) 1 Page - Exar Corporation |
1 / 12 page XRT56L85 Low Power PCM Line Interface Rev. 2.11 E 2000 EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z (510) 668-7000 z FAX (510) 668-7017 1 October 2000-1 FEATURES D Low Power (Typical 14mA) D Single +5V Supply D Up to 2.048 Mbps Operation in Both TX and RX Directions D Receiver Input can be: Balanced Transformer Coupled Capacitively (Twisted Pair) Single Coaxial Capacitive Coupling APPLICATIONS D T1 and CEPT Interfaces D CPI D DMI GENERAL DESCRIPTION The XRT56L85 is a PCM line interface chip. It consists of both transmit and receive circuitry in a DIL 18 pin package. The maximum bit rate the chip can handle is 2.048 Mbps and the signal level to the received can be attenuated by 10dB of cable loss at half the bit rate. Total current consumption is between 12-16mA at +5V. ORDERING INFORMATION Part No. Package Operating Temperature Range XRT56L85P 18 Lead 300 Mil PDIP -40°°°°C to +85°°°°C XRT56L85D 18 Lead 300 Mil JEDEC SOIC -40°°°°C to +85°°°°C BLOCK DIAGRAM 5 14 12 16 17 18 9 3 2 11 8 4 10 6 15 13 1 PDC Positive Threshold Comparator Negative Threshold Comparator Peak Detector TTL Buffer TTL Buffer TTL Buffer TTL Buffer TTL Buffer Bias Bias RPOS RCLK TE RNEG TANK BIAS BIAS TXDATA+ TXDATA- RXDATA+ RXDATA- RXVCC RXGND TXVCC TPOS TCLK TNEG TXGND Figure 1. Block Diagram + + − − 7 |
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Similar Description - XRT56L85D |
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