11

COMMERCIALTEMPERATURERANGE

IDT72V3631/72V3641/72V3651

3.3V CMOS SYNCFIFO™ 512 x 36, 1,024 x 36 and 2,048 x 36

SYNCHRONOUS RETRANSMIT

The synchronous retransmit feature of these devices allow FIFO data to be

read repeatedly starting at a user-selected position. The FIFO is first put into

retransmit mode to select a beginning word and prevent ongoing FIFO write

operationsfromdestroyingretransmitdata. Datavectorswithaminimumlength

ofthreewordscanretransmitrepeatedlystartingattheselectedword. TheFIFO

can be taken out of retransmit mode at any time and allow normal device

operation.

The FIFO is put in retransmit mode by a LOW-to-HIGH transition on CLKB

when the retransmit mode (RTM) input is HIGH and OR is HIGH. The rising

CLKB edge marks the data present in the FIFO output register as the first

retransmit data. The FIFO remains in retransmit mode until a LOW-to-HIGH

transition occurs while RTM is LOW.

When two or more reads have been done past the initial marked retransmit

word, a retransmit is initiated by a LOW-to-HIGH transition on CLKB when the

read-from-mark (RFM) input is HIGH. This rising CLKB edge shifts the first

retransmit word to the FIFO output register and subsequent reads can begin

immediately. Retransmit loops can be done endlessly while the FIFO is in

retransmit mode. RFM must be LOW during the CLKB rising edge that takes

the FIFO out of retransmit mode (see Figure 11).

WhentheFIFOisputintoretransmitmode,itoperateswithtworeadpointers.

The current read pointer operates normally, incrementing each time when a

newwordisshiftedtotheFIFOoutputregister. Thisreadpointerpositionis used

by the OR and

AEflags. Theshadowreadpointerstoresthememorylocation

at the time the device is put into retransmit mode and does not change until the

deviceistakenoutofretransmitmode. Theshadowreadpointerpositionisused

by the IR and

AFflags. DatawritescanproceedwhiletheFIFOisinretransmit

mode, but

AF is set LOW by the write that stores (512-Y), (1,024 - Y), or

(2,048-Y)wordsafterthefirstretransmitwordfortheIDT72V3631,IDT72V3641,

or IDT72V3651, respectively. The IR flag is set LOW by the 512th, 1,024th,

or2,048thwriteafterthefirstretransmitwordfortheIDT72V3631,IDT72V3641,

or IDT72V3651, respectively.

When the FIFO is in retransmit mode and RFM is HIGH, a rising CLKB edge

loads the current read pointer with the shadow read-pointer value and the OR

flagreflectsthenewleveloffillimmediately. IftheretransmitchangestheFIFO

status out of the almost-empty range, up to two CLKB rising edges after the

retransmitcycleareneededtoswitch

AEhigh(seeFigure12).TherisingCLKB

NOTES:

1. When a word is present in the FIFO output register, its previous memory location is free.

2. Data in the output register does not count as a "word i n FIFO memory". Since in FWFT mode, the first words written to an empty FIFO goes unrequested to the output register (no read

operation necessary), it is not included in the memory count.

3. X is the Almost-Empty Offset for

AE. Y is the Almost-Full Offset for AF.

grammingsection). The

AEflagisLOWwhentheFIFOcontainsXorlesswords

andisHIGHwhentheFIFOcontains(X+1)ormorewords. Adatawordpresent

in the FIFO output register has been read from memory.

Two LOW-to-HIGH transitions of CLKB are required after a FIFO write for

the

AEflagtoreflectthenewleveloffill;therefore,theAEflagofaFIFOcontaining

(X+1)ormorewordsremainsLOWiftwocyclesofCLKBhavenotelapsedsince

the write that filled the memory to the (X+1) level. An

AEflagissetHIGHbythe

second LOW-to-HIGH transition of CLKB after the FIFO write that fills memory

to the (X+1) level. A LOW-to-HIGH transition of CLKB begins the first

the FIFO to (X+1) words. Otherwise, the subsequent CLKB cycle may be the

first synchronization cycle (see Figure 9).

ALMOST-FULL FLAG (

AF)

The Almost-Full flag of a FIFO is synchronized to the port Clock that writes

data to its array (CLKA). The state machine that controls an

AFflag monitors

a write-pointer and read-pointer comparator that indicates when the FIFO

memorystatusisalmost-full,almost-full-1,oralmost-full-2. Thealmost-fullstate

isdefinedbythecontentsofregisterY. Thisregisterisloadedwithapresetvalue

during a FIFO reset, programmed from port A, or programmed serially (see

Almost-EmptyflagandAlmost-Fullflagoffsetprogrammingsection). The

AFflag

isLOWwhenthenumberofwordsintheFIFOisgreaterthanorequalto(512-Y),

(1,024-Y), OR (2,048-Y) for the IDT72V3631, IDT72V3641, or IDT72V3651,

respectively. The

AF flag is HIGH when the number of words in the FIFO is

less than or equal to [512-(Y+1)], [1,024-(Y+1)], or [2,048-(Y+1)] for the

IDT72V3631, IDT72V3641, or IDT72V3651, respectively. A data word

present in the FIFO output register has been read from memory.

Two LOW-to-HIGH transitions of CLKA are required after a FIFO read for

its

AFflagtoreflectthenewleveloffill. Therefore,theAFflagofaFIFOcontaining

[512/1,024/2,048-(Y+1)]orlesswordsremainsLOWiftwocyclesofCLKAhave

notelapsedsincethereadthatreducedthenumberofwordsinmemoryto[512/

1,024/2,048-(Y+1)]. An

AF flag is set HIGH by the second LOW-to-HIGH

transition of CLKA after the FIFO read that reduces the number of words in

memory to [512/1,024/2,048-(Y+1)]. A LOW-to-HIGH transition of CLKA

thereadthatreducesthenumberofwordsinmemoryto[512/1,024/2,048-(Y+1)].

Otherwise, the subsequent CLKA cycle may be the first synchronization cycle

(see Figure 10).

Synchronized

Synchronized

to CLKB

to CLKA

OR

AE

AF

IR

00

0

L

L

H

H

1 to X

1 to X

1 to X

H

L

H

H

(X+1) to [512-(Y+1)]

(X+1) to [1,024-(Y+1)]

(X+1) to [2,048-(Y+1)]

H

H

H

H

(512-Y) to 511

(1,024-Y) to 1,023

(2,048-Y) to 2,047

H

H

L

H

512

1,024

2,048

H

H

L

L

TABLE 4 — FIFO FLAG OPERATION