HANBit

HFDOM40MRxxx

URL:www.hbe.co.kr

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HANBit Electronics Co., Ltd.

Rev. 1.0 (November. 2003)

REGISTERS

Overview

ATA register set definitions

(1) . Error Register

(2) . Device/Head Register

(3) . Status & Alternate Status Register

(4) . Device Control Register

(5) . Card Address Register

(6) . Data Register

(7) . Feature Register

(8) . Sector Count Register

(9) . Sector Number Register

(10) . Cylinder low register

(11) . Cylinder high register

PCMCIA Register Set Definitions

(1) . PCMCIA Configuration Option Register

(2) . PCMCIA Configuration and Status Register

(3) . PCMCIA pin Replacement Register

(4) . PCMCIA Socket and Copy Register

ATA Register Set Definitions:

Error Register

This register contains additional information about the source of an error when an error is indicated in bit 0

of the Status register. The bits are defined as follows:

D7

D6

D5

D4

D3

D2

D1

D0

BBK

UNC

0

IDNF

0

ABRT

0

AMNF

This register is also accessed on data bits D15-D8 during a write operation to offset 0 with -CE2 low and

-CE1 high.

Bit 7 (BBK): This bit is set when a Bad Block is detected.

Bit 6 (UNC): This bit is set when an Uncorrectable Error is encountered.

Bit 5: This bit is 0.

Bit 4 (IDNF): The requested sector ID is in error or cannot be found.

Bit 3: This bit is 0.

Bit 2 (Abort): This bit is set if the command has been aborted because of a CompactFlash Storage Card

status condition: (Not Ready, Write Fault, etc.) or when an invalid command has been issued.