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P89LPC952 Datasheet(PDF) 10 Page - NXP Semiconductors

Part # P89LPC952
Description  8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 10-bit ADC
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

P89LPC952 Datasheet(HTML) 10 Page - NXP Semiconductors

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© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 01— 16 September 2005
10 of 66
Philips Semiconductors
P89LPC952
8-bit microcontroller with 10-bit ADC
P1.6
4
42
I/O
P1.6 — Port 1 bit 6.
P1.7/AD04
2
40
I/O
P1.7 — Port 1 bit 7.
I
AD04 — ADC0 channel 4 analog input.
P2.0 to P2.5
I/O
Port 2: Port 2 is an 8-bit I/O port with a user-configurable output type.
During reset Port 2 latches are configured in the input only mode with the
internal pull-up disabled. The operation of Port 2 pins as inputs and
outputs depends upon the port configuration selected. Each port pin is
configured independently. Refer to Section 7.13.1 “Port configurations”
and Table 10 “Static characteristics” for details.
All pins have Schmitt triggered inputs.
Port 2 also provides various special functions as described below:
P2.0/AD07
1
39
I/O
P2.0 — Port 2 bit 0.
I
AD07 — ADC0 channel 7 analog input.
P2.1/AD06
44
38
I/O
P2.1 — Port 2 bit 1.
I
AD06 — ADC0 channel 6 analog input.
P2.2/MOSI
34
28
I/O
P2.2 — Port 2 bit 2.
I/O
MOSI — SPI master out slave in. When configured as master, this pin is
output; when configured as slave, this pin is input.
P2.3/MISO
33
27
I/O
P2.3 — Port 2 bit 3.
I/O
MISO — When configured as master, this pin is input, when configured
as slave, this pin is output.
P2.4/SS
32
26
I/O
P2.4 — Port 2 bit 4.
I/O
SS — SPI Slave select.
P2.5/SPICLK
31
25
I/O
P2.5 — Port 2 bit 5.
I/O
SPICLK — SPI clock. When configured as master, this pin is output;
when configured as slave, this pin is input.
P3.0 to P3.1
I/O
Port 3: Port 3 is a 2-bit I/O port with a user-configurable output type.
During reset Port 3 latches are configured in the input only mode with the
internal pull-up disabled. The operation of Port 3 pins as inputs and
outputs depends upon the port configuration selected. Each port pin is
configured independently. Refer to Section 7.13.1 “Port configurations”
and Table 10 “Static characteristics” for details.
All pins have Schmitt triggered inputs.
Port 3 also provides various special functions as described below:
P3.0/XTAL2/
CLKOUT
12
6
I/O
P3.0 — Port 3 bit 0.
O
XTAL2 — Output from the oscillator amplifier (when a crystal oscillator
option is selected via the flash configuration.
O
CLKOUT — CPU clock divided by 2 when enabled via SFR bit (ENCLK
-TRIM.6). It can be used if the CPU clock is the internal RC oscillator,
watchdog oscillator or external clock input, except when XTAL1/XTAL2
are used to generate clock source for the RTC/system timer.
Table 3:
Pin description …continued
Symbol
Pin
Type Description
PLCC44
LQFP44


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