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SPEAR-07-NC03 Datasheet(PDF) 8 Page - STMicroelectronics |
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SPEAR-07-NC03 Datasheet(HTML) 8 Page - STMicroelectronics |
8 / 194 page 1 Product overview SPEAR-07-NC03 8/194 1 Product overview 1.1 Overview The SPEAR-07-NC03 is based on ARM720T RISC core, cache and MMU. It provide a bridge between four different I/F : 1. IEEE802.3/Ethernet MAC core for network interface. Its base interface with PHY (physical layer) chip is capable of 10/100 Mbps MII (Medium Independent Interface) and 7-wire interface. 2. USB host controller with both interrupt-based and DMA-based data handling method. 3. IEEE1284 host controller offering Compatibility mode, Nibble mode and ECP mode. 4. Shared RAM (Mail box method) for communication with other processors. 5. I2C master controller. |
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Similar Description - SPEAR-07-NC03 |
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