HANBit

HDD64M72D18W

URL : www.hbe.co.kr

10

HANBit Electronics Co.,Ltd

.

REV 1.0 (August.2002)

SIMPLIFIED TRUTH TABLE

COMMAND

CK

E

n-1

CK

E

n

/CS

/R

A

S

/C

A

S

/WE

DM

BA

0,1

A10/

AP

A11,A12

A9~A0

NOTE

Register

Extended MRS

H

X

L

L

L

L

X

OP code

1,2

Register

Mode register set

H

X

L

L

L

L

X

OP code

1,2

Auto refresh

H

3

Entry

H

L

L

L

L

H

X

X

3

L

H

H

H

3

Refresh

Self

refresh

Exit

L

H

H

X

X

X

X

X

3

Bank active & row addr.

H

X

L

L

H

H

X

V

Row address

Auto precharge

disable

L

4

Read &

column

address

Auto precharge eable

H

X

L

H

L

H

X

V

H

Column

Address

(A0 ~A9)

4

Auto precharge

disable

H

L

4

Write &

column

address

Auto precharge

enable

H

X

L

H

L

L

X

V

H

Column

Address

(A0 ~ A9)

4,6

Burst Stop

H

X

L

H

H

L

X

X

7

Bank selection

V

L

Precharge

All banks

H

X

L

L

H

L

X

X

H

X

5

H

X

X

X

Entry

H

L

L

V

V

V

X

Clock suspend or

active power down

Exit

L

H

X

X

X

X

X

X

H

X

X

X

Entry

H

L

L

H

H

H

X

H

X

X

X

Precharge power

down mode

Exit

L

H

L

V

V

V

X

X

DM

H

X

V

X

8

H

X

X

X

No operation command

H

X

L

H

H

H

X

X

(V=Valid, X=Don't care, H=Logic high, L=Logic low)

Notes :

1.

OP Code : Operand code

A0 ~ A12 & BA0 ~ BA1 : Program keys. (@ MRS)

2.

MRS can be issued only at all banks precharge state.

A new command can be issued after 2 CLK cycles of MRS.

3.

Auto refresh functions are as same as CBR refresh of DRAM.

The automatical precharge without row precharge command is meant by "Auto".

Auto/self refresh can be issued only at all banks precharge state.

4.

BA0 ~ BA1 : Bank select addresses.

If both BA0 and BA1 are "Low" at read, write, row active and precharge, bank A is selected.

If both BA0 is "Low" and BA1 is "High" at read, write, row active and precharge, bank B is selected.

If both BA0 is "High" and BA1 is "Low" at read, write, row active and precharge, bank C is selected.

If both BA0 and BA1 are "High" at read, write, row active and precharge, bank D is selected.

If A10/AP is "High" at row precharge, BA0 and BA1 is ignored and all banks are selected.

5.

During burst read or write with auto precharge, new read/write command can not be issued.

Another bank read/write command can be issued after the end of burst.

6.

Burst stop command is valid at every burst length.

7.

DM sampled at the rising and falling edges of the DQS and Data-in are masked at the both edges

(Write DM latency is 0)