MK2304S-2LFT datasheet(1/5 Pages) ICST

Part #	MK2304S-2LFT

Description	ZERO DELAY, LOW SKEW BUFFER

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Manufacturer	ICST [Integrated Circuit Systems]

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MK2304-2

MDS 2304-2 C

1

Revision 050306

Integrat ed Circuit Systems ● 525 Race Stre et, San Jo se, CA 9 5126 ● te l (40 8 ) 2 97-12 01 ● www.ics t.co m

ZERO DELAY, LOW SKEW BUFFER

Description

The MK2304-2 is a low jitter, low skew, high

performance Phase Lock Loop (PLL) based zero delay

buffer for high speed applications. Based on ICS’

proprietary low jitter PLL techniques, the device

provides four low skew outputs at speeds up to 133

MHz at 3.3 V. The MK2304-2 includes a bank of two

outputs running at 1/2X. In the zero delay mode, the

rising edge of the input clock is aligned with the rising

edges of all 4 outputs. Compared to competitive CMOS

devices, the MK2304-2 has the lowest jitter.

The MK2304-2 PLL enters a power-down state when

there are no rising edges on the REF input. In this

mode, all outputs are tri-stated and the PLL is turned

off, resulting in leass than 25 µA of current draw.

ICS manufactures the largest variety of clock

generators and buffers and is the largest clock supplier

in the world.

Features

• Packaged in 8 pin SOIC

• Zero input-output delay

• Two 1X outputs plus two 1/2X outputs

• Output to output skew is less than 200 ps

• Output clocks up from 10 MHz to 133 MHz at 3.3 V

• Ability to generate 2X the input

• Full CMOS outputs with 18 mA output drive

capability at TTL levels at 3.3 V

• Spread SmartTM technology works with spread

spectrum clock generators

• Advanced, low power, sub micron CMOS process

• Operating voltage of 3.3 V

• Available in industial temperature operation

• Available in Pb (lead) free package

• Low Standby Current

Block Diagram

CLKA2

CLKB1

CLKB2

CLKA1

PLL

FBIN

CLKIN

/2

VDD

1

GND

1

BANK

A

BANK

B

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MK2304S-2LFT Datasheet(PDF) 1 Page - Integrated Circuit Systems

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