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HV7100 Datasheet(PDF) 5 Page - Supertex, Inc |
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HV7100 Datasheet(HTML) 5 Page - Supertex, Inc |
5 / 7 page 5 HV7100 The HV7100 requires a single +16V to +75V supply to bias its internal circuitry. It internally generates 3.3V for V DD, and -12V relative to V PP for driving the external P-channel MOSFET. If an external V DD is applied (greater than 3.6V but less than 5.5V), the internal regulator will shut off. The HV7100 drives an external P-channel FET to drive the 24V/48V DC fan. An external diode, connected across the fan terminals, is required to clamp the voltage across the fan to a diode drop during the off period. Pulse Width Modulator The PWM circuit compares the internal triangle wave oscillator (0.5V – 2.5V pk-pk) with the linear control voltage or the DAC output. Its output is a square-wave PWM signal with duty cycle ranging from 0% to 100%. When an external PWM signal is applied to the Enable input and the internal PWM generator is not needed, R T and LIN should be connected to V DD and CT connected to GND. Oscillator A capacitor connected between the C T and GND sets the frequency of the internal triangular frequency oscillator in conjunction with the timing resistor R T. RT sets the charge/ discharge current into and out of C T. The frequency is determined by the following equation: P-Channel Gate Driver The PWM output of the comparator circuit is level translated and is the input to the gate drive circuit. The gate drive circuit turns an external P-channel FET on and off by applying -12V and 0V (reference to V PP), respectively, between its gate and source. The -12V supply to the gate drive circuit is generated internally from V PP. Enable The EN pin directly controls the gate drive circuit. Pulling this pin to logic ground applies 0V to the external P-channel gate to turn it off. Applying a logic HIGH signal or pulling the voltage to V DD resumes the switching cycle of the PWM signal. Speed Control The fan speed can be controlled in three ways: Linear Control - Applying a DC voltage between 0.5V to 2.5V to the LIN pin varies the duty cycle of the voltage driving the fans from 0% to 100% according to: Linear control voltage below 0.5V will turn off the fan completely (0% duty cycle), while voltage greater than 2.5V will fully turn the fan on (100% duty cycle). When using linear control mode, DIN0 – DIN3 should be set to logic 0. If desired, DIN may be used to set a lower limit on the fan speed. This input is immune to moderate noise on the control signal. Digital Control - Applying logic signals to the DIN0 – DIN3 pins sets the duty cycle of the output. 0000 = 0% and 1111 = 100%. See Table 1 for details. In digital control mode, LIN should be set to 0V. DIN0 – DIN3 pins have internal pull downs so that the DAC output will default to 0V when it is not used. External PWM - An external PWM signal can be applied to the Enable pin to directly control the duty cycle. A logic 0 turns the transistor off, and a logic 1 turns it on. When using this control method, connect DIN0 – DIN3, LIN, and R T to V DD. Connect CT to GND. The DAC output and the Linear Control signals are OR’d together. Whichever has the higher value dominates. This allows an analog temperature sensing circuit to override the digital inputs (DIN0 – DIN3) for added system protection. The following table illustrates the correlation between the digital inputs and LIN voltage to the PWM duty cycle. Table 1. DAC signal and LIN voltage to Duty Cycle Programming. Functional Description f RC TT = 0 258 . DIN3 DIN2 DIN1 DIN0 LIN Gate Drive Duty Cycle 0000 0.500V 0%* 0001 0.633V 6.7% 0010 0.766V 13.3% 0011 0.900V 20.0% 0100 1.033V 26.7% 0101 1.167V 33.3% 0110 1.300V 40.0% 0111 1.433V 46.7% 1000 1.567V 53.3% 1001 1.700V 60.0% 1010 1.833V 66.7% 1011 1.967V 73.3% 1100 2.100V 80.0% 1101 2.233V 86.7% 1110 2.367V 93.3% 1111 2.500V 100%* * Guaranteed 0% @ 0000 and 100% @ 1111 25 . 0 2 LI N V D |
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