2
Integrated Color Space / Raster-To-Block Converter
YCrCb(4:4:4) to YCrCb(4:2;2). Format convertor #2 can perform
decimation or interpolation of chrominance, while format conver-
tor #1 can perform decimation in compression. In addition, data
passing through format convertor #1 to the raster to block con-
vertor can be decimated globally by 2, vertically and/or
horizontally, to implement half-screen or quarter-screen
compression.
In expansion, format convertor #2 can perform global horizontal
and/or vertical interpolation, as well as interpolation of chromi-
nance components. Its output is multiplexed with the pixel input
bus, so that the pixel output bus contains the expanded data
within a window on the input data. The color space convertor is
switched in or out as required, simultaneously with the multiplex-
ing of its input, so that the color space of the expanded data is
independent of that of the input.
By means of the delay element shown, the processing pipeline
delay from pixel input to output is kept constant even when color
space conversion is bypassed. The input horizontal and vertical
synchronization signals are output after undergoing an identical
delay.
The mode of operation of the ZR36016 and operating parame-
ters are determined by the control registers, which are
programmed from the host interface. There are two modes of
controlling compressions and expansions: single frame mode
and sequential mode. In the single frame mode, the ZR36016
performs the desired process on a single frame (or field in case
of interlaced motion video) and goes idle until explicitly com-
manded to perform another process. In sequential mode, a new
process starts automatically every frame or field if enabled. The
sequential mode is most suitable for motion JPEG.
VIN
Figure 2. ZR36016 Block Diagrams
HIN
PXIN
Delay
VOUT
HOUT
PXOUT
PXOE
Format
Converter #2
Delay
Color Space
Converter
MUX
Format
Converter #1
Sub-Buffer
MDATA
Raster/Block Converter
PXEN
PXCLK
MADD
MWE
MOE
SYSCLK
START
RESET
FBSY
WINDOW
CBSY
COMP
DSYNC
STOP
EOS
BDATA
Control
Registers
DATA
ADD
RD
WR
CS