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MB90F378PFF-GE1 Datasheet(PDF) 7 Page - Fujitsu Component Limited. |
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MB90F378PFF-GE1 Datasheet(HTML) 7 Page - Fujitsu Component Limited. |
7 / 65 page MB90378 Series 7 (Continued) Pin no. Pin name I/O circuit Pin status during reset Function LQFP-144 5 P44 F Port input General-purpose Nch open-drain I/O port. PSCK2 Serial clock I/O pin for PS/2 interface ch 2. This function is selected when PS/2 interface ch 2 is enabled. 6 P45 F General-purpose Nch open-drain I/O port. PSDA2 Serial data I/O pin for PS/2 interface ch 2. This function is selected when PS/2 interface ch 2 is enabled. 7 P46 G General-purpose Nch open-drain I/O port. CLKRUN LPC clock status / restart request I/O pin for serial IRQ controller. This function is selected when serial IRQ and LPC clock restart request is enabled. 8 P47 H General-purpose I/O port. SERIRQ Serial IRQ data I/O pin for serial IRQ controller. This function is selected when serial IRQ is enabled. 9 P50 J General-purpose Nch open-drain I/O port. GA20 GA20 output for LPC interface. This function is selected when GA20 function is enabled. 10 P51 H General-purpose I/O port. LFRAME LFRAME input for LPC interface. This function is selected when LPC interface is enabled. 11 P52 H General-purpose I/O port. LRESET Reset input for LPC interface. This function is selected when LPC interface is enabled. 12 P53 H General-purpose I/O port. LCK Clock input for LPC interface. This function is selected when LPC interface is enabled. 13 to 16 P54 to P57 H General-purpose I/O ports. LAD0 to LAD3 Address/Data I/O for LPC interface. This function is selected when LPC interface is enabled. 93 to 98 P60 to P65 I General-purpose I/O ports. INT0 to INT5 Can be used as DTP/external interrupt request input ch 0 to 5. Input is enabled when 1 is set in ENIR: EN0 to 5 in standby mode. 99 P66 I General-purpose I/O port. UCK1 Serial clock I/O pin for UART ch 1. This function is enabled when UART ch 1 enables clock output. |
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