VRS700
VERSA
Datasheet Rev 1.3
1134 Ste Catherine Street West, Suite 900, Montreal, Quebec, Canada H3B 1H4 Tel: (514) 871-2447 http://www.goalsemi.com
6
Program Memory Structure
Program Memory
The VRS700 includes 64K of on-chip Flash memory
that can be used as general program memory. The
address range for the 64KB of Flash memory is 0000h
to FFFFh.
Program Status Word Register
The register below contains the program state flags.
These flags may be read or written to by the user.
TABLE 5: PROGRAM STATUS WORD REGISTER (PSW) - SFR DOH
7
6
5
4
3
2
1
0
CY
AC
F0
RS1
RS0
OV
-
P
Bit
Mnemonic
Description
7
CY
Carry Bit
6
AC
Auxiliary Carry Bit from bit 3 to 4.
5
F0
User definer flag
4
RS1
R0-R7 Registers bank select bit 0
3
RS0
R0-R7 Registers bank select bit 1
2
OV
Overflow flag
1
-
-
0
P
Parity flag
RS1
RS0
Active Bank
Address
0
0
0
00h-07h
0
1
1
08h-0Fh
1
0
2
10h-17h
1
1
3
18-1Fh
Data Pointer
The VRS 700 has one 16-bit data pointer. The DPTR is
accessed through two SFR addresses: DPL located at
address 82h and DPH located at address 83h.
Data Memory
The VRS700 has 4K of on-chip SRAM: 256 bytes are
configured like the internal memory structure of a
standard 80C52, while the expanded 3840 bytes can
be accessed using external memory addressing
(MOVX) or in bank mapping direct addressing mode.
Note: By default, the expanded RAM memory is
disabled. To use it, users must first set the bit OME (2)
of the System Control Register (SFR BFh).
FIGURE 3: VRS700 DATA MEMORY
Upper 128 bytes
(Can only be accessed in
indirect addressing mode only)
Lower 128 bytes
(Can be accessed in indirect and
direct addressing mode)
SFR
(Can only be accessed in direct
addressing mode only)
Expanded 3840 bytes
(Mapped on "external"
memory space. Can by
accessed by using the
MOVX instruction or by
Bank mapping direct
addressing mode)
(OME=1)
FF
80
0EFF
0000
FF
80
7F
00
By default, the expanded RAM area is active. It is
possible to disable it by clearing the OME bit of the
SCONF register located at address BFh in the SFR.
Lower 128 bytes (00h to 7Fh, Bank 0 & Bank 1)
The lower 128 bytes (Figure 3) of data memory (from
00h to 7Fh) can be summarized in the following points:
• Address range 00h to 7Fh can be accessed in
direct and indirect addressing modes.
• Address range 00h to 1Fh includes R0-R7
registers area.
• Address range 20h to 2Fh is bit addressable.
• Address range 30h to 7Fh is not bit addressable
and can be used as general purposes storage.
• Range 40h-7Fh can be configured as a window
to access the whole 4K of RAM memory.
Upper 128 bytes (80h to FFh)
The upper 128 bytes of the data memory ranging from
80h to FFh can be accessed using indirect addressing
or by using the bank mapping in direct addressing
mode (see Table 8).
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